diff --git a/.settings/language.settings.xml b/.settings/language.settings.xml
index 434bba1..14c3dcd 100644
--- a/.settings/language.settings.xml
+++ b/.settings/language.settings.xml
@@ -5,7 +5,7 @@
-
+
@@ -16,7 +16,7 @@
-
+
diff --git a/Core/Inc/main.h b/Core/Inc/main.h
index f25b3dc..3156d2e 100644
--- a/Core/Inc/main.h
+++ b/Core/Inc/main.h
@@ -66,3 +66,6 @@ void Error_Handler(void);
#endif
#endif /* __MAIN_H */
+
+#define ISA_BASE_RD 0x20000U
+#define ISA_BASE_WR 0U
diff --git a/Core/Src/main.c b/Core/Src/main.c
index cbcc4b4..e3b75d3 100644
--- a/Core/Src/main.c
+++ b/Core/Src/main.c
@@ -50,6 +50,8 @@ SRAM_HandleTypeDef hsram1;
void SystemClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_FMC_Init(void);
+void write_isa(uint16_t addr, uint16_t data);
+uint16_t read_isa(uint16_t addr);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
@@ -94,14 +96,27 @@ int main(void)
/* USER CODE END 2 */
/* Infinite loop */
- /* USER CODE BEGIN WHILE */
+ /* USER CODE BEGIN 3 */
while (1)
{
MX_LWIP_Process();
+ write_isa(0x100, 0xaaaa);
+ write_isa(0x100, 0x5555);
+ read_isa(0x100);
}
/* USER CODE END 3 */
}
+uint16_t read_isa(uint16_t addr)
+{
+ return *(uint16_t*)(ISA_BASE_RD + addr);
+}
+
+void write_isa(uint16_t addr, uint16_t data)
+{
+ *(uint16_t*)(ISA_BASE_WR + addr) = data;
+}
+
/**
* @brief System Clock Configuration
* @retval None
diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/subdir.mk b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/subdir.mk
index c4b42c8..d5aca7f 100644
--- a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/subdir.mk
+++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/subdir.mk
@@ -19,8 +19,10 @@ C_SRCS += \
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c \
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c \
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.c \
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c \
-../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c
OBJS += \
./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o \
@@ -37,8 +39,10 @@ OBJS += \
./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o \
./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o \
./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.o \
./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o \
-./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.o
C_DEPS += \
./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.d \
@@ -55,8 +59,10 @@ C_DEPS += \
./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.d \
./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.d \
./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.d \
./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.d \
-./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.d
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.d
# Each subdirectory must supply rules for building sources it contributes
@@ -66,7 +72,7 @@ Drivers/STM32F4xx_HAL_Driver/Src/%.o Drivers/STM32F4xx_HAL_Driver/Src/%.su: ../D
clean: clean-Drivers-2f-STM32F4xx_HAL_Driver-2f-Src
clean-Drivers-2f-STM32F4xx_HAL_Driver-2f-Src:
- -$(RM) ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.su
+ -$(RM) ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_eth.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.su
.PHONY: clean-Drivers-2f-STM32F4xx_HAL_Driver-2f-Src
diff --git a/Debug/objects.list b/Debug/objects.list
index b8fa5c7..87ca6e6 100644
--- a/Debug/objects.list
+++ b/Debug/objects.list
@@ -18,8 +18,10 @@
"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o"
"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o"
"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.o"
"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o"
"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.o"
"./LWIP/App/lwip.o"
"./LWIP/Target/ethernetif.o"
"./Middlewares/Third_Party/LwIP/src/api/api_lib.o"
diff --git a/Debug/yau-07b.list b/Debug/yau-07b.list
index 3ce15d1..8743177 100644
--- a/Debug/yau-07b.list
+++ b/Debug/yau-07b.list
@@ -5,51 +5,51 @@ Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 000001ac 08000000 08000000 00010000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 1 .text 00014800 080001b0 080001b0 000101b0 2**4
+ 1 .text 00014d18 080001b0 080001b0 000101b0 2**4
CONTENTS, ALLOC, LOAD, READONLY, CODE
- 2 .rodata 000032c4 080149b0 080149b0 000249b0 2**3
+ 2 .rodata 000032c4 08014ec8 08014ec8 00024ec8 2**3
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 3 .ARM.extab 00000000 08017c74 08017c74 000309e0 2**0
+ 3 .ARM.extab 00000000 0801818c 0801818c 000309e0 2**0
CONTENTS
- 4 .ARM 00000008 08017c74 08017c74 00027c74 2**2
+ 4 .ARM 00000008 0801818c 0801818c 0002818c 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
- 5 .preinit_array 00000000 08017c7c 08017c7c 000309e0 2**0
+ 5 .preinit_array 00000000 08018194 08018194 000309e0 2**0
CONTENTS, ALLOC, LOAD, DATA
- 6 .init_array 00000008 08017c7c 08017c7c 00027c7c 2**2
+ 6 .init_array 00000008 08018194 08018194 00028194 2**2
CONTENTS, ALLOC, LOAD, DATA
- 7 .fini_array 00000004 08017c84 08017c84 00027c84 2**2
+ 7 .fini_array 00000004 0801819c 0801819c 0002819c 2**2
CONTENTS, ALLOC, LOAD, DATA
- 8 .data 000009e0 20000000 08017c88 00030000 2**3
+ 8 .data 000009e0 20000000 080181a0 00030000 2**3
CONTENTS, ALLOC, LOAD, DATA
9 .ccmram 00000000 10000000 10000000 000309e0 2**0
CONTENTS
- 10 .bss 0000839c 200009e0 200009e0 000309e0 2**2
+ 10 .bss 000083f0 200009e0 200009e0 000309e0 2**2
ALLOC
- 11 ._user_heap_stack 00000604 20008d7c 20008d7c 000309e0 2**0
+ 11 ._user_heap_stack 00000600 20008dd0 20008dd0 000309e0 2**0
ALLOC
12 .ARM.attributes 00000030 00000000 00000000 000309e0 2**0
CONTENTS, READONLY
- 13 .debug_info 00018d19 00000000 00000000 00030a10 2**0
+ 13 .debug_info 0001b6de 00000000 00000000 00030a10 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 14 .debug_abbrev 0000484f 00000000 00000000 00049729 2**0
+ 14 .debug_abbrev 00004da7 00000000 00000000 0004c0ee 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 15 .debug_aranges 000011c8 00000000 00000000 0004df78 2**3
+ 15 .debug_aranges 000013a8 00000000 00000000 00050e98 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
- 16 .debug_ranges 00001148 00000000 00000000 0004f140 2**3
+ 16 .debug_ranges 00001308 00000000 00000000 00052240 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
- 17 .debug_macro 0002dfa9 00000000 00000000 00050288 2**0
+ 17 .debug_macro 0002ebef 00000000 00000000 00053548 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 18 .debug_line 0001e3d9 00000000 00000000 0007e231 2**0
+ 18 .debug_line 000202ea 00000000 00000000 00082137 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 19 .debug_str 000e7bec 00000000 00000000 0009c60a 2**0
+ 19 .debug_str 000ec4ae 00000000 00000000 000a2421 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
- 20 .comment 00000050 00000000 00000000 001841f6 2**0
+ 20 .comment 00000050 00000000 00000000 0018e8cf 2**0
CONTENTS, READONLY
- 21 .debug_frame 00005abc 00000000 00000000 00184248 2**2
+ 21 .debug_frame 00006304 00000000 00000000 0018e920 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
- 22 .stab 000000cc 00000000 00000000 00189d04 2**2
+ 22 .stab 000000cc 00000000 00000000 00194c24 2**2
CONTENTS, READONLY, DEBUGGING
- 23 .stabstr 000001b9 00000000 00000000 00189dd0 2**0
+ 23 .stabstr 000001b9 00000000 00000000 00194cf0 2**0
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
@@ -68,7 +68,7 @@ Disassembly of section .text:
80001c6: bd10 pop {r4, pc}
80001c8: 200009e0 .word 0x200009e0
80001cc: 00000000 .word 0x00000000
- 80001d0: 08014998 .word 0x08014998
+ 80001d0: 08014eb0 .word 0x08014eb0
080001d4 :
80001d4: b508 push {r3, lr}
@@ -80,7 +80,7 @@ Disassembly of section .text:
80001e2: bd08 pop {r3, pc}
80001e4: 00000000 .word 0x00000000
80001e8: 200009e4 .word 0x200009e4
- 80001ec: 08014998 .word 0x08014998
+ 80001ec: 08014eb0 .word 0x08014eb0
080001f0 :
80001f0: 4603 mov r3, r0
@@ -1221,30924 +1221,31046 @@ int main(void)
{
8000ecc: b580 push {r7, lr}
8000ece: af00 add r7, sp, #0
+ /* USER CODE END 1 */
+
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
- 8000ed0: f000 faca bl 8001468
+ 8000ed0: f000 fc02 bl 80016d8
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
- 8000ed4: f000 f808 bl 8000ee8
+ 8000ed4: f000 f83a bl 8000f4c
+ /* USER CODE BEGIN SysInit */
+
+ /* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
- 8000ed8: f000 f872 bl 8000fc0
+ 8000ed8: f000 f906 bl 80010e8
MX_LWIP_Init();
- 8000edc: f002 fb2c bl 8003538
- /* Infinite loop */
- /* USER CODE BEGIN WHILE */
+ 8000edc: f002 fdba bl 8003a54
+ MX_FMC_Init();
+ 8000ee0: f000 f8a0 bl 8001024
+ /* Infinite loop */
+ /* USER CODE BEGIN 3 */
while (1)
{
MX_LWIP_Process();
- 8000ee0: f002 fb98 bl 8003614
- 8000ee4: e7fc b.n 8000ee0
- ...
+ 8000ee4: f002 fe24 bl 8003b30
+ write_isa(0x100, 0xaaaa);
+ 8000ee8: f64a 21aa movw r1, #43690 ; 0xaaaa
+ 8000eec: f44f 7080 mov.w r0, #256 ; 0x100
+ 8000ef0: f000 f81a bl 8000f28
+ write_isa(0x100, 0x5555);
+ 8000ef4: f245 5155 movw r1, #21845 ; 0x5555
+ 8000ef8: f44f 7080 mov.w r0, #256 ; 0x100
+ 8000efc: f000 f814 bl 8000f28
+ read_isa(0x100);
+ 8000f00: f44f 7080 mov.w r0, #256 ; 0x100
+ 8000f04: f000 f801 bl 8000f0a
+ MX_LWIP_Process();
+ 8000f08: e7ec b.n 8000ee4
-08000ee8 :
+08000f0a :
+ }
+ /* USER CODE END 3 */
+}
+
+uint16_t read_isa(uint16_t addr)
+{
+ 8000f0a: b480 push {r7}
+ 8000f0c: b083 sub sp, #12
+ 8000f0e: af00 add r7, sp, #0
+ 8000f10: 4603 mov r3, r0
+ 8000f12: 80fb strh r3, [r7, #6]
+ return *(uint16_t*)(ISA_BASE_RD + addr);
+ 8000f14: 88fb ldrh r3, [r7, #6]
+ 8000f16: f503 3300 add.w r3, r3, #131072 ; 0x20000
+ 8000f1a: 881b ldrh r3, [r3, #0]
+}
+ 8000f1c: 4618 mov r0, r3
+ 8000f1e: 370c adds r7, #12
+ 8000f20: 46bd mov sp, r7
+ 8000f22: f85d 7b04 ldr.w r7, [sp], #4
+ 8000f26: 4770 bx lr
+
+08000f28 :
+
+void write_isa(uint16_t addr, uint16_t data)
+{
+ 8000f28: b480 push {r7}
+ 8000f2a: b083 sub sp, #12
+ 8000f2c: af00 add r7, sp, #0
+ 8000f2e: 4603 mov r3, r0
+ 8000f30: 460a mov r2, r1
+ 8000f32: 80fb strh r3, [r7, #6]
+ 8000f34: 4613 mov r3, r2
+ 8000f36: 80bb strh r3, [r7, #4]
+ *(uint16_t*)(ISA_BASE_WR + addr) = data;
+ 8000f38: 88fb ldrh r3, [r7, #6]
+ 8000f3a: 461a mov r2, r3
+ 8000f3c: 88bb ldrh r3, [r7, #4]
+ 8000f3e: 8013 strh r3, [r2, #0]
+}
+ 8000f40: bf00 nop
+ 8000f42: 370c adds r7, #12
+ 8000f44: 46bd mov sp, r7
+ 8000f46: f85d 7b04 ldr.w r7, [sp], #4
+ 8000f4a: 4770 bx lr
+
+08000f4c :
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
- 8000ee8: b580 push {r7, lr}
- 8000eea: b094 sub sp, #80 ; 0x50
- 8000eec: af00 add r7, sp, #0
+ 8000f4c: b580 push {r7, lr}
+ 8000f4e: b094 sub sp, #80 ; 0x50
+ 8000f50: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
- 8000eee: f107 0320 add.w r3, r7, #32
- 8000ef2: 2230 movs r2, #48 ; 0x30
- 8000ef4: 2100 movs r1, #0
- 8000ef6: 4618 mov r0, r3
- 8000ef8: f00e ffd6 bl 800fea8
+ 8000f52: f107 0320 add.w r3, r7, #32
+ 8000f56: 2230 movs r2, #48 ; 0x30
+ 8000f58: 2100 movs r1, #0
+ 8000f5a: 4618 mov r0, r3
+ 8000f5c: f00f fa32 bl 80103c4
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
- 8000efc: f107 030c add.w r3, r7, #12
- 8000f00: 2200 movs r2, #0
- 8000f02: 601a str r2, [r3, #0]
- 8000f04: 605a str r2, [r3, #4]
- 8000f06: 609a str r2, [r3, #8]
- 8000f08: 60da str r2, [r3, #12]
- 8000f0a: 611a str r2, [r3, #16]
+ 8000f60: f107 030c add.w r3, r7, #12
+ 8000f64: 2200 movs r2, #0
+ 8000f66: 601a str r2, [r3, #0]
+ 8000f68: 605a str r2, [r3, #4]
+ 8000f6a: 609a str r2, [r3, #8]
+ 8000f6c: 60da str r2, [r3, #12]
+ 8000f6e: 611a str r2, [r3, #16]
/** Configure the main internal regulator output voltage
*/
__HAL_RCC_PWR_CLK_ENABLE();
- 8000f0c: 2300 movs r3, #0
- 8000f0e: 60bb str r3, [r7, #8]
- 8000f10: 4b29 ldr r3, [pc, #164] ; (8000fb8 )
- 8000f12: 6c1b ldr r3, [r3, #64] ; 0x40
- 8000f14: 4a28 ldr r2, [pc, #160] ; (8000fb8 )
- 8000f16: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
- 8000f1a: 6413 str r3, [r2, #64] ; 0x40
- 8000f1c: 4b26 ldr r3, [pc, #152] ; (8000fb8 )
- 8000f1e: 6c1b ldr r3, [r3, #64] ; 0x40
- 8000f20: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
- 8000f24: 60bb str r3, [r7, #8]
- 8000f26: 68bb ldr r3, [r7, #8]
+ 8000f70: 2300 movs r3, #0
+ 8000f72: 60bb str r3, [r7, #8]
+ 8000f74: 4b29 ldr r3, [pc, #164] ; (800101c )
+ 8000f76: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8000f78: 4a28 ldr r2, [pc, #160] ; (800101c )
+ 8000f7a: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
+ 8000f7e: 6413 str r3, [r2, #64] ; 0x40
+ 8000f80: 4b26 ldr r3, [pc, #152] ; (800101c )
+ 8000f82: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8000f84: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
+ 8000f88: 60bb str r3, [r7, #8]
+ 8000f8a: 68bb ldr r3, [r7, #8]
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
- 8000f28: 2300 movs r3, #0
- 8000f2a: 607b str r3, [r7, #4]
- 8000f2c: 4b23 ldr r3, [pc, #140] ; (8000fbc )
- 8000f2e: 681b ldr r3, [r3, #0]
- 8000f30: f423 4340 bic.w r3, r3, #49152 ; 0xc000
- 8000f34: 4a21 ldr r2, [pc, #132] ; (8000fbc )
- 8000f36: f443 4380 orr.w r3, r3, #16384 ; 0x4000
- 8000f3a: 6013 str r3, [r2, #0]
- 8000f3c: 4b1f ldr r3, [pc, #124] ; (8000fbc )
- 8000f3e: 681b ldr r3, [r3, #0]
- 8000f40: f403 4340 and.w r3, r3, #49152 ; 0xc000
- 8000f44: 607b str r3, [r7, #4]
- 8000f46: 687b ldr r3, [r7, #4]
+ 8000f8c: 2300 movs r3, #0
+ 8000f8e: 607b str r3, [r7, #4]
+ 8000f90: 4b23 ldr r3, [pc, #140] ; (8001020 )
+ 8000f92: 681b ldr r3, [r3, #0]
+ 8000f94: f423 4340 bic.w r3, r3, #49152 ; 0xc000
+ 8000f98: 4a21 ldr r2, [pc, #132] ; (8001020 )
+ 8000f9a: f443 4380 orr.w r3, r3, #16384 ; 0x4000
+ 8000f9e: 6013 str r3, [r2, #0]
+ 8000fa0: 4b1f ldr r3, [pc, #124] ; (8001020 )
+ 8000fa2: 681b ldr r3, [r3, #0]
+ 8000fa4: f403 4340 and.w r3, r3, #49152 ; 0xc000
+ 8000fa8: 607b str r3, [r7, #4]
+ 8000faa: 687b ldr r3, [r7, #4]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
- 8000f48: 2302 movs r3, #2
- 8000f4a: 623b str r3, [r7, #32]
+ 8000fac: 2302 movs r3, #2
+ 8000fae: 623b str r3, [r7, #32]
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
- 8000f4c: 2301 movs r3, #1
- 8000f4e: 62fb str r3, [r7, #44] ; 0x2c
+ 8000fb0: 2301 movs r3, #1
+ 8000fb2: 62fb str r3, [r7, #44] ; 0x2c
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
- 8000f50: 2310 movs r3, #16
- 8000f52: 633b str r3, [r7, #48] ; 0x30
+ 8000fb4: 2310 movs r3, #16
+ 8000fb6: 633b str r3, [r7, #48] ; 0x30
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
- 8000f54: 2302 movs r3, #2
- 8000f56: 63bb str r3, [r7, #56] ; 0x38
+ 8000fb8: 2302 movs r3, #2
+ 8000fba: 63bb str r3, [r7, #56] ; 0x38
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
- 8000f58: 2300 movs r3, #0
- 8000f5a: 63fb str r3, [r7, #60] ; 0x3c
+ 8000fbc: 2300 movs r3, #0
+ 8000fbe: 63fb str r3, [r7, #60] ; 0x3c
RCC_OscInitStruct.PLL.PLLM = 8;
- 8000f5c: 2308 movs r3, #8
- 8000f5e: 643b str r3, [r7, #64] ; 0x40
+ 8000fc0: 2308 movs r3, #8
+ 8000fc2: 643b str r3, [r7, #64] ; 0x40
RCC_OscInitStruct.PLL.PLLN = 100;
- 8000f60: 2364 movs r3, #100 ; 0x64
- 8000f62: 647b str r3, [r7, #68] ; 0x44
+ 8000fc4: 2364 movs r3, #100 ; 0x64
+ 8000fc6: 647b str r3, [r7, #68] ; 0x44
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
- 8000f64: 2302 movs r3, #2
- 8000f66: 64bb str r3, [r7, #72] ; 0x48
+ 8000fc8: 2302 movs r3, #2
+ 8000fca: 64bb str r3, [r7, #72] ; 0x48
RCC_OscInitStruct.PLL.PLLQ = 4;
- 8000f68: 2304 movs r3, #4
- 8000f6a: 64fb str r3, [r7, #76] ; 0x4c
+ 8000fcc: 2304 movs r3, #4
+ 8000fce: 64fb str r3, [r7, #76] ; 0x4c
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
- 8000f6c: f107 0320 add.w r3, r7, #32
- 8000f70: 4618 mov r0, r3
- 8000f72: f001 feb1 bl 8002cd8
- 8000f76: 4603 mov r3, r0
- 8000f78: 2b00 cmp r3, #0
- 8000f7a: d001 beq.n 8000f80
+ 8000fd0: f107 0320 add.w r3, r7, #32
+ 8000fd4: 4618 mov r0, r3
+ 8000fd6: f001 ffb7 bl 8002f48
+ 8000fda: 4603 mov r3, r0
+ 8000fdc: 2b00 cmp r3, #0
+ 8000fde: d001 beq.n 8000fe4
{
Error_Handler();
- 8000f7c: f000 f880 bl 8001080
+ 8000fe0: f000 f90c bl 80011fc
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
- 8000f80: 230f movs r3, #15
- 8000f82: 60fb str r3, [r7, #12]
+ 8000fe4: 230f movs r3, #15
+ 8000fe6: 60fb str r3, [r7, #12]
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
- 8000f84: 2302 movs r3, #2
- 8000f86: 613b str r3, [r7, #16]
+ 8000fe8: 2302 movs r3, #2
+ 8000fea: 613b str r3, [r7, #16]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
- 8000f88: 2300 movs r3, #0
- 8000f8a: 617b str r3, [r7, #20]
+ 8000fec: 2300 movs r3, #0
+ 8000fee: 617b str r3, [r7, #20]
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
- 8000f8c: f44f 53a0 mov.w r3, #5120 ; 0x1400
- 8000f90: 61bb str r3, [r7, #24]
+ 8000ff0: f44f 53a0 mov.w r3, #5120 ; 0x1400
+ 8000ff4: 61bb str r3, [r7, #24]
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
- 8000f92: f44f 5380 mov.w r3, #4096 ; 0x1000
- 8000f96: 61fb str r3, [r7, #28]
+ 8000ff6: f44f 5380 mov.w r3, #4096 ; 0x1000
+ 8000ffa: 61fb str r3, [r7, #28]
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK)
- 8000f98: f107 030c add.w r3, r7, #12
- 8000f9c: 2103 movs r1, #3
- 8000f9e: 4618 mov r0, r3
- 8000fa0: f002 f912 bl 80031c8
- 8000fa4: 4603 mov r3, r0
- 8000fa6: 2b00 cmp r3, #0
- 8000fa8: d001 beq.n 8000fae
+ 8000ffc: f107 030c add.w r3, r7, #12
+ 8001000: 2103 movs r1, #3
+ 8001002: 4618 mov r0, r3
+ 8001004: f002 fa18 bl 8003438
+ 8001008: 4603 mov r3, r0
+ 800100a: 2b00 cmp r3, #0
+ 800100c: d001 beq.n 8001012
{
Error_Handler();
- 8000faa: f000 f869 bl 8001080
+ 800100e: f000 f8f5 bl 80011fc
}
}
- 8000fae: bf00 nop
- 8000fb0: 3750 adds r7, #80 ; 0x50
- 8000fb2: 46bd mov sp, r7
- 8000fb4: bd80 pop {r7, pc}
- 8000fb6: bf00 nop
- 8000fb8: 40023800 .word 0x40023800
- 8000fbc: 40007000 .word 0x40007000
+ 8001012: bf00 nop
+ 8001014: 3750 adds r7, #80 ; 0x50
+ 8001016: 46bd mov sp, r7
+ 8001018: bd80 pop {r7, pc}
+ 800101a: bf00 nop
+ 800101c: 40023800 .word 0x40023800
+ 8001020: 40007000 .word 0x40007000
-08000fc0 :
+08001024 :
+
+/* FMC initialization function */
+static void MX_FMC_Init(void)
+{
+ 8001024: b580 push {r7, lr}
+ 8001026: b088 sub sp, #32
+ 8001028: af00 add r7, sp, #0
+
+ /* USER CODE BEGIN FMC_Init 0 */
+
+ /* USER CODE END FMC_Init 0 */
+
+ FMC_NORSRAM_TimingTypeDef Timing = {0};
+ 800102a: 1d3b adds r3, r7, #4
+ 800102c: 2200 movs r2, #0
+ 800102e: 601a str r2, [r3, #0]
+ 8001030: 605a str r2, [r3, #4]
+ 8001032: 609a str r2, [r3, #8]
+ 8001034: 60da str r2, [r3, #12]
+ 8001036: 611a str r2, [r3, #16]
+ 8001038: 615a str r2, [r3, #20]
+ 800103a: 619a str r2, [r3, #24]
+
+ /* USER CODE END FMC_Init 1 */
+
+ /** Perform the SRAM1 memory initialization sequence
+ */
+ hsram1.Instance = FMC_NORSRAM_DEVICE;
+ 800103c: 4b28 ldr r3, [pc, #160] ; (80010e0 )
+ 800103e: f04f 4220 mov.w r2, #2684354560 ; 0xa0000000
+ 8001042: 601a str r2, [r3, #0]
+ hsram1.Extended = FMC_NORSRAM_EXTENDED_DEVICE;
+ 8001044: 4b26 ldr r3, [pc, #152] ; (80010e0 )
+ 8001046: 4a27 ldr r2, [pc, #156] ; (80010e4 )
+ 8001048: 605a str r2, [r3, #4]
+ /* hsram1.Init */
+ hsram1.Init.NSBank = FMC_NORSRAM_BANK1;
+ 800104a: 4b25 ldr r3, [pc, #148] ; (80010e0 )
+ 800104c: 2200 movs r2, #0
+ 800104e: 609a str r2, [r3, #8]
+ hsram1.Init.DataAddressMux = FMC_DATA_ADDRESS_MUX_DISABLE;
+ 8001050: 4b23 ldr r3, [pc, #140] ; (80010e0 )
+ 8001052: 2200 movs r2, #0
+ 8001054: 60da str r2, [r3, #12]
+ hsram1.Init.MemoryType = FMC_MEMORY_TYPE_SRAM;
+ 8001056: 4b22 ldr r3, [pc, #136] ; (80010e0 )
+ 8001058: 2200 movs r2, #0
+ 800105a: 611a str r2, [r3, #16]
+ hsram1.Init.MemoryDataWidth = FMC_NORSRAM_MEM_BUS_WIDTH_16;
+ 800105c: 4b20 ldr r3, [pc, #128] ; (80010e0 )
+ 800105e: 2210 movs r2, #16
+ 8001060: 615a str r2, [r3, #20]
+ hsram1.Init.BurstAccessMode = FMC_BURST_ACCESS_MODE_DISABLE;
+ 8001062: 4b1f ldr r3, [pc, #124] ; (80010e0 )
+ 8001064: 2200 movs r2, #0
+ 8001066: 619a str r2, [r3, #24]
+ hsram1.Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_LOW;
+ 8001068: 4b1d ldr r3, [pc, #116] ; (80010e0 )
+ 800106a: 2200 movs r2, #0
+ 800106c: 61da str r2, [r3, #28]
+ hsram1.Init.WrapMode = FMC_WRAP_MODE_DISABLE;
+ 800106e: 4b1c ldr r3, [pc, #112] ; (80010e0 )
+ 8001070: 2200 movs r2, #0
+ 8001072: 621a str r2, [r3, #32]
+ hsram1.Init.WaitSignalActive = FMC_WAIT_TIMING_BEFORE_WS;
+ 8001074: 4b1a ldr r3, [pc, #104] ; (80010e0 )
+ 8001076: 2200 movs r2, #0
+ 8001078: 625a str r2, [r3, #36] ; 0x24
+ hsram1.Init.WriteOperation = FMC_WRITE_OPERATION_DISABLE;
+ 800107a: 4b19 ldr r3, [pc, #100] ; (80010e0 )
+ 800107c: 2200 movs r2, #0
+ 800107e: 629a str r2, [r3, #40] ; 0x28
+ hsram1.Init.WaitSignal = FMC_WAIT_SIGNAL_DISABLE;
+ 8001080: 4b17 ldr r3, [pc, #92] ; (80010e0 )
+ 8001082: 2200 movs r2, #0
+ 8001084: 62da str r2, [r3, #44] ; 0x2c
+ hsram1.Init.ExtendedMode = FMC_EXTENDED_MODE_DISABLE;
+ 8001086: 4b16 ldr r3, [pc, #88] ; (80010e0 )
+ 8001088: 2200 movs r2, #0
+ 800108a: 631a str r2, [r3, #48] ; 0x30
+ hsram1.Init.AsynchronousWait = FMC_ASYNCHRONOUS_WAIT_DISABLE;
+ 800108c: 4b14 ldr r3, [pc, #80] ; (80010e0 )
+ 800108e: 2200 movs r2, #0
+ 8001090: 635a str r2, [r3, #52] ; 0x34
+ hsram1.Init.WriteBurst = FMC_WRITE_BURST_DISABLE;
+ 8001092: 4b13 ldr r3, [pc, #76] ; (80010e0 )
+ 8001094: 2200 movs r2, #0
+ 8001096: 639a str r2, [r3, #56] ; 0x38
+ hsram1.Init.ContinuousClock = FMC_CONTINUOUS_CLOCK_SYNC_ONLY;
+ 8001098: 4b11 ldr r3, [pc, #68] ; (80010e0 )
+ 800109a: 2200 movs r2, #0
+ 800109c: 63da str r2, [r3, #60] ; 0x3c
+ hsram1.Init.PageSize = FMC_PAGE_SIZE_NONE;
+ 800109e: 4b10 ldr r3, [pc, #64] ; (80010e0 )
+ 80010a0: 2200 movs r2, #0
+ 80010a2: 645a str r2, [r3, #68] ; 0x44
+ /* Timing */
+ Timing.AddressSetupTime = 15;
+ 80010a4: 230f movs r3, #15
+ 80010a6: 607b str r3, [r7, #4]
+ Timing.AddressHoldTime = 15;
+ 80010a8: 230f movs r3, #15
+ 80010aa: 60bb str r3, [r7, #8]
+ Timing.DataSetupTime = 255;
+ 80010ac: 23ff movs r3, #255 ; 0xff
+ 80010ae: 60fb str r3, [r7, #12]
+ Timing.BusTurnAroundDuration = 15;
+ 80010b0: 230f movs r3, #15
+ 80010b2: 613b str r3, [r7, #16]
+ Timing.CLKDivision = 16;
+ 80010b4: 2310 movs r3, #16
+ 80010b6: 617b str r3, [r7, #20]
+ Timing.DataLatency = 17;
+ 80010b8: 2311 movs r3, #17
+ 80010ba: 61bb str r3, [r7, #24]
+ Timing.AccessMode = FMC_ACCESS_MODE_A;
+ 80010bc: 2300 movs r3, #0
+ 80010be: 61fb str r3, [r7, #28]
+ /* ExtTiming */
+
+ if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK)
+ 80010c0: 1d3b adds r3, r7, #4
+ 80010c2: 2200 movs r2, #0
+ 80010c4: 4619 mov r1, r3
+ 80010c6: 4806 ldr r0, [pc, #24] ; (80010e0 )
+ 80010c8: f002 fb6e bl 80037a8
+ 80010cc: 4603 mov r3, r0
+ 80010ce: 2b00 cmp r3, #0
+ 80010d0: d001 beq.n 80010d6
+ {
+ Error_Handler( );
+ 80010d2: f000 f893 bl 80011fc
+ }
+
+ /* USER CODE BEGIN FMC_Init 2 */
+
+ /* USER CODE END FMC_Init 2 */
+}
+ 80010d6: bf00 nop
+ 80010d8: 3720 adds r7, #32
+ 80010da: 46bd mov sp, r7
+ 80010dc: bd80 pop {r7, pc}
+ 80010de: bf00 nop
+ 80010e0: 200009fc .word 0x200009fc
+ 80010e4: a0000104 .word 0xa0000104
+
+080010e8 :
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
- 8000fc0: b580 push {r7, lr}
- 8000fc2: b08a sub sp, #40 ; 0x28
- 8000fc4: af00 add r7, sp, #0
+ 80010e8: b580 push {r7, lr}
+ 80010ea: b08c sub sp, #48 ; 0x30
+ 80010ec: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8000fc6: f107 0314 add.w r3, r7, #20
- 8000fca: 2200 movs r2, #0
- 8000fcc: 601a str r2, [r3, #0]
- 8000fce: 605a str r2, [r3, #4]
- 8000fd0: 609a str r2, [r3, #8]
- 8000fd2: 60da str r2, [r3, #12]
- 8000fd4: 611a str r2, [r3, #16]
+ 80010ee: f107 031c add.w r3, r7, #28
+ 80010f2: 2200 movs r2, #0
+ 80010f4: 601a str r2, [r3, #0]
+ 80010f6: 605a str r2, [r3, #4]
+ 80010f8: 609a str r2, [r3, #8]
+ 80010fa: 60da str r2, [r3, #12]
+ 80010fc: 611a str r2, [r3, #16]
/* GPIO Ports Clock Enable */
+ __HAL_RCC_GPIOE_CLK_ENABLE();
+ 80010fe: 2300 movs r3, #0
+ 8001100: 61bb str r3, [r7, #24]
+ 8001102: 4b3c ldr r3, [pc, #240] ; (80011f4 )
+ 8001104: 6b1b ldr r3, [r3, #48] ; 0x30
+ 8001106: 4a3b ldr r2, [pc, #236] ; (80011f4 )
+ 8001108: f043 0310 orr.w r3, r3, #16
+ 800110c: 6313 str r3, [r2, #48] ; 0x30
+ 800110e: 4b39 ldr r3, [pc, #228] ; (80011f4 )
+ 8001110: 6b1b ldr r3, [r3, #48] ; 0x30
+ 8001112: f003 0310 and.w r3, r3, #16
+ 8001116: 61bb str r3, [r7, #24]
+ 8001118: 69bb ldr r3, [r7, #24]
__HAL_RCC_GPIOC_CLK_ENABLE();
- 8000fd6: 2300 movs r3, #0
- 8000fd8: 613b str r3, [r7, #16]
- 8000fda: 4b27 ldr r3, [pc, #156] ; (8001078 )
- 8000fdc: 6b1b ldr r3, [r3, #48] ; 0x30
- 8000fde: 4a26 ldr r2, [pc, #152] ; (8001078 )
- 8000fe0: f043 0304 orr.w r3, r3, #4
- 8000fe4: 6313 str r3, [r2, #48] ; 0x30
- 8000fe6: 4b24 ldr r3, [pc, #144] ; (8001078 )
- 8000fe8: 6b1b ldr r3, [r3, #48] ; 0x30
- 8000fea: f003 0304 and.w r3, r3, #4
- 8000fee: 613b str r3, [r7, #16]
- 8000ff0: 693b ldr r3, [r7, #16]
+ 800111a: 2300 movs r3, #0
+ 800111c: 617b str r3, [r7, #20]
+ 800111e: 4b35 ldr r3, [pc, #212] ; (80011f4 )
+ 8001120: 6b1b ldr r3, [r3, #48] ; 0x30
+ 8001122: 4a34 ldr r2, [pc, #208] ; (80011f4 )
+ 8001124: f043 0304 orr.w r3, r3, #4
+ 8001128: 6313 str r3, [r2, #48] ; 0x30
+ 800112a: 4b32 ldr r3, [pc, #200] ; (80011f4 )
+ 800112c: 6b1b ldr r3, [r3, #48] ; 0x30
+ 800112e: f003 0304 and.w r3, r3, #4
+ 8001132: 617b str r3, [r7, #20]
+ 8001134: 697b ldr r3, [r7, #20]
+ __HAL_RCC_GPIOF_CLK_ENABLE();
+ 8001136: 2300 movs r3, #0
+ 8001138: 613b str r3, [r7, #16]
+ 800113a: 4b2e ldr r3, [pc, #184] ; (80011f4 )
+ 800113c: 6b1b ldr r3, [r3, #48] ; 0x30
+ 800113e: 4a2d ldr r2, [pc, #180] ; (80011f4 )
+ 8001140: f043 0320 orr.w r3, r3, #32
+ 8001144: 6313 str r3, [r2, #48] ; 0x30
+ 8001146: 4b2b ldr r3, [pc, #172] ; (80011f4 )
+ 8001148: 6b1b ldr r3, [r3, #48] ; 0x30
+ 800114a: f003 0320 and.w r3, r3, #32
+ 800114e: 613b str r3, [r7, #16]
+ 8001150: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOA_CLK_ENABLE();
- 8000ff2: 2300 movs r3, #0
- 8000ff4: 60fb str r3, [r7, #12]
- 8000ff6: 4b20 ldr r3, [pc, #128] ; (8001078 )
- 8000ff8: 6b1b ldr r3, [r3, #48] ; 0x30
- 8000ffa: 4a1f ldr r2, [pc, #124] ; (8001078 )
- 8000ffc: f043 0301 orr.w r3, r3, #1
- 8001000: 6313 str r3, [r2, #48] ; 0x30
- 8001002: 4b1d ldr r3, [pc, #116] ; (8001078 )
- 8001004: 6b1b ldr r3, [r3, #48] ; 0x30
- 8001006: f003 0301 and.w r3, r3, #1
- 800100a: 60fb str r3, [r7, #12]
- 800100c: 68fb ldr r3, [r7, #12]
- __HAL_RCC_GPIOB_CLK_ENABLE();
- 800100e: 2300 movs r3, #0
- 8001010: 60bb str r3, [r7, #8]
- 8001012: 4b19 ldr r3, [pc, #100] ; (8001078 )
- 8001014: 6b1b ldr r3, [r3, #48] ; 0x30
- 8001016: 4a18 ldr r2, [pc, #96] ; (8001078 )
- 8001018: f043 0302 orr.w r3, r3, #2
- 800101c: 6313 str r3, [r2, #48] ; 0x30
- 800101e: 4b16 ldr r3, [pc, #88] ; (8001078 )
- 8001020: 6b1b ldr r3, [r3, #48] ; 0x30
- 8001022: f003 0302 and.w r3, r3, #2
- 8001026: 60bb str r3, [r7, #8]
- 8001028: 68bb ldr r3, [r7, #8]
+ 8001152: 2300 movs r3, #0
+ 8001154: 60fb str r3, [r7, #12]
+ 8001156: 4b27 ldr r3, [pc, #156] ; (80011f4 )
+ 8001158: 6b1b ldr r3, [r3, #48] ; 0x30
+ 800115a: 4a26 ldr r2, [pc, #152] ; (80011f4 )
+ 800115c: f043 0301 orr.w r3, r3, #1
+ 8001160: 6313 str r3, [r2, #48] ; 0x30
+ 8001162: 4b24 ldr r3, [pc, #144] ; (80011f4 )
+ 8001164: 6b1b ldr r3, [r3, #48] ; 0x30
+ 8001166: f003 0301 and.w r3, r3, #1
+ 800116a: 60fb str r3, [r7, #12]
+ 800116c: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOG_CLK_ENABLE();
- 800102a: 2300 movs r3, #0
- 800102c: 607b str r3, [r7, #4]
- 800102e: 4b12 ldr r3, [pc, #72] ; (8001078 )
- 8001030: 6b1b ldr r3, [r3, #48] ; 0x30
- 8001032: 4a11 ldr r2, [pc, #68] ; (8001078 )
- 8001034: f043 0340 orr.w r3, r3, #64 ; 0x40
- 8001038: 6313 str r3, [r2, #48] ; 0x30
- 800103a: 4b0f ldr r3, [pc, #60] ; (8001078 )
- 800103c: 6b1b ldr r3, [r3, #48] ; 0x30
- 800103e: f003 0340 and.w r3, r3, #64 ; 0x40
- 8001042: 607b str r3, [r7, #4]
- 8001044: 687b ldr r3, [r7, #4]
+ 800116e: 2300 movs r3, #0
+ 8001170: 60bb str r3, [r7, #8]
+ 8001172: 4b20 ldr r3, [pc, #128] ; (80011f4 )
+ 8001174: 6b1b ldr r3, [r3, #48] ; 0x30
+ 8001176: 4a1f ldr r2, [pc, #124] ; (80011f4 )
+ 8001178: f043 0340 orr.w r3, r3, #64 ; 0x40
+ 800117c: 6313 str r3, [r2, #48] ; 0x30
+ 800117e: 4b1d ldr r3, [pc, #116] ; (80011f4 )
+ 8001180: 6b1b ldr r3, [r3, #48] ; 0x30
+ 8001182: f003 0340 and.w r3, r3, #64 ; 0x40
+ 8001186: 60bb str r3, [r7, #8]
+ 8001188: 68bb ldr r3, [r7, #8]
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+ 800118a: 2300 movs r3, #0
+ 800118c: 607b str r3, [r7, #4]
+ 800118e: 4b19 ldr r3, [pc, #100] ; (80011f4 )
+ 8001190: 6b1b ldr r3, [r3, #48] ; 0x30
+ 8001192: 4a18 ldr r2, [pc, #96] ; (80011f4 )
+ 8001194: f043 0302 orr.w r3, r3, #2
+ 8001198: 6313 str r3, [r2, #48] ; 0x30
+ 800119a: 4b16 ldr r3, [pc, #88] ; (80011f4 )
+ 800119c: 6b1b ldr r3, [r3, #48] ; 0x30
+ 800119e: f003 0302 and.w r3, r3, #2
+ 80011a2: 607b str r3, [r7, #4]
+ 80011a4: 687b ldr r3, [r7, #4]
+ __HAL_RCC_GPIOD_CLK_ENABLE();
+ 80011a6: 2300 movs r3, #0
+ 80011a8: 603b str r3, [r7, #0]
+ 80011aa: 4b12 ldr r3, [pc, #72] ; (80011f4 )
+ 80011ac: 6b1b ldr r3, [r3, #48] ; 0x30
+ 80011ae: 4a11 ldr r2, [pc, #68] ; (80011f4 )
+ 80011b0: f043 0308 orr.w r3, r3, #8
+ 80011b4: 6313 str r3, [r2, #48] ; 0x30
+ 80011b6: 4b0f ldr r3, [pc, #60] ; (80011f4 )
+ 80011b8: 6b1b ldr r3, [r3, #48] ; 0x30
+ 80011ba: f003 0308 and.w r3, r3, #8
+ 80011be: 603b str r3, [r7, #0]
+ 80011c0: 683b ldr r3, [r7, #0]
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOC, GPIO_PIN_14, GPIO_PIN_RESET);
- 8001046: 2200 movs r2, #0
- 8001048: f44f 4180 mov.w r1, #16384 ; 0x4000
- 800104c: 480b ldr r0, [pc, #44] ; (800107c )
- 800104e: f001 fe29 bl 8002ca4
+ 80011c2: 2200 movs r2, #0
+ 80011c4: f44f 4180 mov.w r1, #16384 ; 0x4000
+ 80011c8: 480b ldr r0, [pc, #44] ; (80011f8 )
+ 80011ca: f001 fea3 bl 8002f14
/*Configure GPIO pin : PC14 */
GPIO_InitStruct.Pin = GPIO_PIN_14;
- 8001052: f44f 4380 mov.w r3, #16384 ; 0x4000
- 8001056: 617b str r3, [r7, #20]
+ 80011ce: f44f 4380 mov.w r3, #16384 ; 0x4000
+ 80011d2: 61fb str r3, [r7, #28]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 8001058: 2301 movs r3, #1
- 800105a: 61bb str r3, [r7, #24]
+ 80011d4: 2301 movs r3, #1
+ 80011d6: 623b str r3, [r7, #32]
GPIO_InitStruct.Pull = GPIO_NOPULL;
- 800105c: 2300 movs r3, #0
- 800105e: 61fb str r3, [r7, #28]
+ 80011d8: 2300 movs r3, #0
+ 80011da: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8001060: 2300 movs r3, #0
- 8001062: 623b str r3, [r7, #32]
+ 80011dc: 2300 movs r3, #0
+ 80011de: 62bb str r3, [r7, #40] ; 0x28
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
- 8001064: f107 0314 add.w r3, r7, #20
- 8001068: 4619 mov r1, r3
- 800106a: 4804 ldr r0, [pc, #16] ; (800107c )
- 800106c: f001 fc6e bl 800294c
+ 80011e0: f107 031c add.w r3, r7, #28
+ 80011e4: 4619 mov r1, r3
+ 80011e6: 4804 ldr r0, [pc, #16] ; (80011f8 )
+ 80011e8: f001 fce8 bl 8002bbc
}
- 8001070: bf00 nop
- 8001072: 3728 adds r7, #40 ; 0x28
- 8001074: 46bd mov sp, r7
- 8001076: bd80 pop {r7, pc}
- 8001078: 40023800 .word 0x40023800
- 800107c: 40020800 .word 0x40020800
+ 80011ec: bf00 nop
+ 80011ee: 3730 adds r7, #48 ; 0x30
+ 80011f0: 46bd mov sp, r7
+ 80011f2: bd80 pop {r7, pc}
+ 80011f4: 40023800 .word 0x40023800
+ 80011f8: 40020800 .word 0x40020800
-08001080 :
+080011fc :
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
- 8001080: b480 push {r7}
- 8001082: af00 add r7, sp, #0
+ 80011fc: b480 push {r7}
+ 80011fe: af00 add r7, sp, #0
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i" : : : "memory");
- 8001084: b672 cpsid i
+ 8001200: b672 cpsid i
}
- 8001086: bf00 nop
+ 8001202: bf00 nop
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
- 8001088: e7fe b.n 8001088
+ 8001204: e7fe b.n 8001204
...
-0800108c :
+08001208 :
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
- 800108c: b480 push {r7}
- 800108e: b083 sub sp, #12
- 8001090: af00 add r7, sp, #0
+ 8001208: b480 push {r7}
+ 800120a: b083 sub sp, #12
+ 800120c: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_SYSCFG_CLK_ENABLE();
- 8001092: 2300 movs r3, #0
- 8001094: 607b str r3, [r7, #4]
- 8001096: 4b10 ldr r3, [pc, #64] ; (80010d8 )
- 8001098: 6c5b ldr r3, [r3, #68] ; 0x44
- 800109a: 4a0f ldr r2, [pc, #60] ; (80010d8 )
- 800109c: f443 4380 orr.w r3, r3, #16384 ; 0x4000
- 80010a0: 6453 str r3, [r2, #68] ; 0x44
- 80010a2: 4b0d ldr r3, [pc, #52] ; (80010d8 )
- 80010a4: 6c5b ldr r3, [r3, #68] ; 0x44
- 80010a6: f403 4380 and.w r3, r3, #16384 ; 0x4000
- 80010aa: 607b str r3, [r7, #4]
- 80010ac: 687b ldr r3, [r7, #4]
+ 800120e: 2300 movs r3, #0
+ 8001210: 607b str r3, [r7, #4]
+ 8001212: 4b10 ldr r3, [pc, #64] ; (8001254 )
+ 8001214: 6c5b ldr r3, [r3, #68] ; 0x44
+ 8001216: 4a0f ldr r2, [pc, #60] ; (8001254 )
+ 8001218: f443 4380 orr.w r3, r3, #16384 ; 0x4000
+ 800121c: 6453 str r3, [r2, #68] ; 0x44
+ 800121e: 4b0d ldr r3, [pc, #52] ; (8001254 )
+ 8001220: 6c5b ldr r3, [r3, #68] ; 0x44
+ 8001222: f403 4380 and.w r3, r3, #16384 ; 0x4000
+ 8001226: 607b str r3, [r7, #4]
+ 8001228: 687b ldr r3, [r7, #4]
__HAL_RCC_PWR_CLK_ENABLE();
- 80010ae: 2300 movs r3, #0
- 80010b0: 603b str r3, [r7, #0]
- 80010b2: 4b09 ldr r3, [pc, #36] ; (80010d8 )
- 80010b4: 6c1b ldr r3, [r3, #64] ; 0x40
- 80010b6: 4a08 ldr r2, [pc, #32] ; (80010d8 )
- 80010b8: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
- 80010bc: 6413 str r3, [r2, #64] ; 0x40
- 80010be: 4b06 ldr r3, [pc, #24] ; (80010d8 )
- 80010c0: 6c1b ldr r3, [r3, #64] ; 0x40
- 80010c2: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
- 80010c6: 603b str r3, [r7, #0]
- 80010c8: 683b ldr r3, [r7, #0]
+ 800122a: 2300 movs r3, #0
+ 800122c: 603b str r3, [r7, #0]
+ 800122e: 4b09 ldr r3, [pc, #36] ; (8001254 )
+ 8001230: 6c1b ldr r3, [r3, #64] ; 0x40
+ 8001232: 4a08 ldr r2, [pc, #32] ; (8001254 )
+ 8001234: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
+ 8001238: 6413 str r3, [r2, #64] ; 0x40
+ 800123a: 4b06 ldr r3, [pc, #24] ; (8001254 )
+ 800123c: 6c1b ldr r3, [r3, #64] ; 0x40
+ 800123e: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
+ 8001242: 603b str r3, [r7, #0]
+ 8001244: 683b ldr r3, [r7, #0]
/* System interrupt init*/
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
- 80010ca: bf00 nop
- 80010cc: 370c adds r7, #12
- 80010ce: 46bd mov sp, r7
- 80010d0: f85d 7b04 ldr.w r7, [sp], #4
- 80010d4: 4770 bx lr
- 80010d6: bf00 nop
- 80010d8: 40023800 .word 0x40023800
+ 8001246: bf00 nop
+ 8001248: 370c adds r7, #12
+ 800124a: 46bd mov sp, r7
+ 800124c: f85d 7b04 ldr.w r7, [sp], #4
+ 8001250: 4770 bx lr
+ 8001252: bf00 nop
+ 8001254: 40023800 .word 0x40023800
-080010dc :
+08001258 :
+
+static uint32_t FMC_Initialized = 0;
+
+static void HAL_FMC_MspInit(void){
+ 8001258: b580 push {r7, lr}
+ 800125a: b086 sub sp, #24
+ 800125c: af00 add r7, sp, #0
+ /* USER CODE BEGIN FMC_MspInit 0 */
+
+ /* USER CODE END FMC_MspInit 0 */
+ GPIO_InitTypeDef GPIO_InitStruct ={0};
+ 800125e: 1d3b adds r3, r7, #4
+ 8001260: 2200 movs r2, #0
+ 8001262: 601a str r2, [r3, #0]
+ 8001264: 605a str r2, [r3, #4]
+ 8001266: 609a str r2, [r3, #8]
+ 8001268: 60da str r2, [r3, #12]
+ 800126a: 611a str r2, [r3, #16]
+ if (FMC_Initialized) {
+ 800126c: 4b2c ldr r3, [pc, #176] ; (8001320 )
+ 800126e: 681b ldr r3, [r3, #0]
+ 8001270: 2b00 cmp r3, #0
+ 8001272: d150 bne.n 8001316
+ return;
+ }
+ FMC_Initialized = 1;
+ 8001274: 4b2a ldr r3, [pc, #168] ; (8001320 )
+ 8001276: 2201 movs r2, #1
+ 8001278: 601a str r2, [r3, #0]
+
+ /* Peripheral clock enable */
+ __HAL_RCC_FMC_CLK_ENABLE();
+ 800127a: 2300 movs r3, #0
+ 800127c: 603b str r3, [r7, #0]
+ 800127e: 4b29 ldr r3, [pc, #164] ; (8001324 )
+ 8001280: 6b9b ldr r3, [r3, #56] ; 0x38
+ 8001282: 4a28 ldr r2, [pc, #160] ; (8001324 )
+ 8001284: f043 0301 orr.w r3, r3, #1
+ 8001288: 6393 str r3, [r2, #56] ; 0x38
+ 800128a: 4b26 ldr r3, [pc, #152] ; (8001324 )
+ 800128c: 6b9b ldr r3, [r3, #56] ; 0x38
+ 800128e: f003 0301 and.w r3, r3, #1
+ 8001292: 603b str r3, [r7, #0]
+ 8001294: 683b ldr r3, [r7, #0]
+ PD1 ------> FMC_D3
+ PD4 ------> FMC_NOE
+ PD5 ------> FMC_NWE
+ PD7 ------> FMC_NE1
+ */
+ GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6
+ 8001296: f64f 73f8 movw r3, #65528 ; 0xfff8
+ 800129a: 607b str r3, [r7, #4]
+ |GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
+ |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
+ |GPIO_PIN_15;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 800129c: 2302 movs r3, #2
+ 800129e: 60bb str r3, [r7, #8]
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 80012a0: 2300 movs r3, #0
+ 80012a2: 60fb str r3, [r7, #12]
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 80012a4: 2303 movs r3, #3
+ 80012a6: 613b str r3, [r7, #16]
+ GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ 80012a8: 230c movs r3, #12
+ 80012aa: 617b str r3, [r7, #20]
+ HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 80012ac: 1d3b adds r3, r7, #4
+ 80012ae: 4619 mov r1, r3
+ 80012b0: 481d ldr r0, [pc, #116] ; (8001328 )
+ 80012b2: f001 fc83 bl 8002bbc
+
+ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
+ 80012b6: f24f 033f movw r3, #61503 ; 0xf03f
+ 80012ba: 607b str r3, [r7, #4]
+ |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_12|GPIO_PIN_13
+ |GPIO_PIN_14|GPIO_PIN_15;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 80012bc: 2302 movs r3, #2
+ 80012be: 60bb str r3, [r7, #8]
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 80012c0: 2300 movs r3, #0
+ 80012c2: 60fb str r3, [r7, #12]
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 80012c4: 2303 movs r3, #3
+ 80012c6: 613b str r3, [r7, #16]
+ GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ 80012c8: 230c movs r3, #12
+ 80012ca: 617b str r3, [r7, #20]
+ HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+ 80012cc: 1d3b adds r3, r7, #4
+ 80012ce: 4619 mov r1, r3
+ 80012d0: 4816 ldr r0, [pc, #88] ; (800132c )
+ 80012d2: f001 fc73 bl 8002bbc
+
+ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
+ 80012d6: 233f movs r3, #63 ; 0x3f
+ 80012d8: 607b str r3, [r7, #4]
+ |GPIO_PIN_4|GPIO_PIN_5;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 80012da: 2302 movs r3, #2
+ 80012dc: 60bb str r3, [r7, #8]
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 80012de: 2300 movs r3, #0
+ 80012e0: 60fb str r3, [r7, #12]
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 80012e2: 2303 movs r3, #3
+ 80012e4: 613b str r3, [r7, #16]
+ GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ 80012e6: 230c movs r3, #12
+ 80012e8: 617b str r3, [r7, #20]
+ HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+ 80012ea: 1d3b adds r3, r7, #4
+ 80012ec: 4619 mov r1, r3
+ 80012ee: 4810 ldr r0, [pc, #64] ; (8001330 )
+ 80012f0: f001 fc64 bl 8002bbc
+
+ GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
+ 80012f4: f64f 73b3 movw r3, #65459 ; 0xffb3
+ 80012f8: 607b str r3, [r7, #4]
+ |GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15
+ |GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5
+ |GPIO_PIN_7;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 80012fa: 2302 movs r3, #2
+ 80012fc: 60bb str r3, [r7, #8]
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 80012fe: 2300 movs r3, #0
+ 8001300: 60fb str r3, [r7, #12]
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 8001302: 2303 movs r3, #3
+ 8001304: 613b str r3, [r7, #16]
+ GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ 8001306: 230c movs r3, #12
+ 8001308: 617b str r3, [r7, #20]
+ HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+ 800130a: 1d3b adds r3, r7, #4
+ 800130c: 4619 mov r1, r3
+ 800130e: 4809 ldr r0, [pc, #36] ; (8001334 )
+ 8001310: f001 fc54 bl 8002bbc
+ 8001314: e000 b.n 8001318
+ return;
+ 8001316: bf00 nop
+
+ /* USER CODE BEGIN FMC_MspInit 1 */
+
+ /* USER CODE END FMC_MspInit 1 */
+}
+ 8001318: 3718 adds r7, #24
+ 800131a: 46bd mov sp, r7
+ 800131c: bd80 pop {r7, pc}
+ 800131e: bf00 nop
+ 8001320: 20000a4c .word 0x20000a4c
+ 8001324: 40023800 .word 0x40023800
+ 8001328: 40021000 .word 0x40021000
+ 800132c: 40021400 .word 0x40021400
+ 8001330: 40021800 .word 0x40021800
+ 8001334: 40020c00 .word 0x40020c00
+
+08001338 :
+
+void HAL_SRAM_MspInit(SRAM_HandleTypeDef* hsram){
+ 8001338: b580 push {r7, lr}
+ 800133a: b082 sub sp, #8
+ 800133c: af00 add r7, sp, #0
+ 800133e: 6078 str r0, [r7, #4]
+ /* USER CODE BEGIN SRAM_MspInit 0 */
+
+ /* USER CODE END SRAM_MspInit 0 */
+ HAL_FMC_MspInit();
+ 8001340: f7ff ff8a bl 8001258
+ /* USER CODE BEGIN SRAM_MspInit 1 */
+
+ /* USER CODE END SRAM_MspInit 1 */
+}
+ 8001344: bf00 nop
+ 8001346: 3708 adds r7, #8
+ 8001348: 46bd mov sp, r7
+ 800134a: bd80 pop {r7, pc}
+
+0800134c :
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
- 80010dc: b480 push {r7}
- 80010de: af00 add r7, sp, #0
+ 800134c: b480 push {r7}
+ 800134e: af00 add r7, sp, #0
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
- 80010e0: e7fe b.n 80010e0
+ 8001350: e7fe b.n 8001350
-080010e2 :
+08001352 :
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
- 80010e2: b480 push {r7}
- 80010e4: af00 add r7, sp, #0
+ 8001352: b480 push {r7}
+ 8001354: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
- 80010e6: e7fe b.n 80010e6
+ 8001356: e7fe b.n 8001356
-080010e8 :
+08001358 :
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
- 80010e8: b480 push {r7}
- 80010ea: af00 add r7, sp, #0
+ 8001358: b480 push {r7}
+ 800135a: af00 add r7, sp, #0
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
- 80010ec: e7fe b.n 80010ec
+ 800135c: e7fe b.n 800135c
-080010ee :
+0800135e :
/**
* @brief This function handles Pre-fetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
- 80010ee: b480 push {r7}
- 80010f0: af00 add r7, sp, #0
+ 800135e: b480 push {r7}
+ 8001360: af00 add r7, sp, #0
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
- 80010f2: e7fe b.n 80010f2
+ 8001362: e7fe b.n 8001362
-080010f4 :
+08001364 :
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
- 80010f4: b480 push {r7}
- 80010f6: af00 add r7, sp, #0
+ 8001364: b480 push {r7}
+ 8001366: af00 add r7, sp, #0
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
- 80010f8: e7fe b.n 80010f8
+ 8001368: e7fe b.n 8001368
-080010fa :
+0800136a :
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
- 80010fa: b480 push {r7}
- 80010fc: af00 add r7, sp, #0
+ 800136a: b480 push {r7}
+ 800136c: af00 add r7, sp, #0
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
- 80010fe: bf00 nop
- 8001100: 46bd mov sp, r7
- 8001102: f85d 7b04 ldr.w r7, [sp], #4
- 8001106: 4770 bx lr
+ 800136e: bf00 nop
+ 8001370: 46bd mov sp, r7
+ 8001372: f85d 7b04 ldr.w r7, [sp], #4
+ 8001376: 4770 bx lr
-08001108 :
+08001378 :
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
- 8001108: b480 push {r7}
- 800110a: af00 add r7, sp, #0
+ 8001378: b480 push {r7}
+ 800137a: af00 add r7, sp, #0
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
- 800110c: bf00 nop
- 800110e: 46bd mov sp, r7
- 8001110: f85d 7b04 ldr.w r7, [sp], #4
- 8001114: 4770 bx lr
+ 800137c: bf00 nop
+ 800137e: 46bd mov sp, r7
+ 8001380: f85d 7b04 ldr.w r7, [sp], #4
+ 8001384: 4770 bx lr
-08001116 :
+08001386 :
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
- 8001116: b480 push {r7}
- 8001118: af00 add r7, sp, #0
+ 8001386: b480 push {r7}
+ 8001388: af00 add r7, sp, #0
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
- 800111a: bf00 nop
- 800111c: 46bd mov sp, r7
- 800111e: f85d 7b04 ldr.w r7, [sp], #4
- 8001122: 4770 bx lr
+ 800138a: bf00 nop
+ 800138c: 46bd mov sp, r7
+ 800138e: f85d 7b04 ldr.w r7, [sp], #4
+ 8001392: 4770 bx lr
-08001124 :
+08001394 :
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
- 8001124: b580 push {r7, lr}
- 8001126: af00 add r7, sp, #0
+ 8001394: b580 push {r7, lr}
+ 8001396: af00 add r7, sp, #0
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
- 8001128: f000 f9f0 bl 800150c
+ 8001398: f000 f9f0 bl 800177c
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
- 800112c: bf00 nop
- 800112e: bd80 pop {r7, pc}
+ 800139c: bf00 nop
+ 800139e: bd80 pop {r7, pc}
-08001130 :
+080013a0 :
* configuration.
* @param None
* @retval None
*/
void SystemInit(void)
{
- 8001130: b480 push {r7}
- 8001132: af00 add r7, sp, #0
+ 80013a0: b480 push {r7}
+ 80013a2: af00 add r7, sp, #0
/* FPU settings ------------------------------------------------------------*/
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
- 8001134: 4b06 ldr r3, [pc, #24] ; (8001150 )
- 8001136: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
- 800113a: 4a05 ldr r2, [pc, #20] ; (8001150 )
- 800113c: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000
- 8001140: f8c2 3088 str.w r3, [r2, #136] ; 0x88
+ 80013a4: 4b06 ldr r3, [pc, #24] ; (80013c0 )
+ 80013a6: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
+ 80013aa: 4a05 ldr r2, [pc, #20] ; (80013c0 )
+ 80013ac: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000
+ 80013b0: f8c2 3088 str.w r3, [r2, #136] ; 0x88
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#endif /* USER_VECT_TAB_ADDRESS */
}
- 8001144: bf00 nop
- 8001146: 46bd mov sp, r7
- 8001148: f85d 7b04 ldr.w r7, [sp], #4
- 800114c: 4770 bx lr
- 800114e: bf00 nop
- 8001150: e000ed00 .word 0xe000ed00
+ 80013b4: bf00 nop
+ 80013b6: 46bd mov sp, r7
+ 80013b8: f85d 7b04 ldr.w r7, [sp], #4
+ 80013bc: 4770 bx lr
+ 80013be: bf00 nop
+ 80013c0: e000ed00 .word 0xe000ed00
-08001154 :
+080013c4 :
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr r0, =_estack
- 8001154: 480d ldr r0, [pc, #52] ; (800118c )
+ 80013c4: 480d ldr r0, [pc, #52] ; (80013fc )
mov sp, r0 /* set stack pointer */
- 8001156: 4685 mov sp, r0
+ 80013c6: 4685 mov sp, r0
/* Call the clock system initialization function.*/
bl SystemInit
- 8001158: f7ff ffea bl 8001130
+ 80013c8: f7ff ffea bl 80013a0
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
- 800115c: 480c ldr r0, [pc, #48] ; (8001190 )
+ 80013cc: 480c ldr r0, [pc, #48] ; (8001400 )
ldr r1, =_edata
- 800115e: 490d ldr r1, [pc, #52] ; (8001194 )
+ 80013ce: 490d ldr r1, [pc, #52] ; (8001404 )
ldr r2, =_sidata
- 8001160: 4a0d ldr r2, [pc, #52] ; (8001198 )
+ 80013d0: 4a0d ldr r2, [pc, #52] ; (8001408 )
movs r3, #0
- 8001162: 2300 movs r3, #0
+ 80013d2: 2300 movs r3, #0
b LoopCopyDataInit
- 8001164: e002 b.n 800116c
+ 80013d4: e002 b.n 80013dc
-08001166 :
+080013d6 :
CopyDataInit:
ldr r4, [r2, r3]
- 8001166: 58d4 ldr r4, [r2, r3]
+ 80013d6: 58d4 ldr r4, [r2, r3]
str r4, [r0, r3]
- 8001168: 50c4 str r4, [r0, r3]
+ 80013d8: 50c4 str r4, [r0, r3]
adds r3, r3, #4
- 800116a: 3304 adds r3, #4
+ 80013da: 3304 adds r3, #4
-0800116c :
+080013dc :
LoopCopyDataInit:
adds r4, r0, r3
- 800116c: 18c4 adds r4, r0, r3
+ 80013dc: 18c4 adds r4, r0, r3
cmp r4, r1
- 800116e: 428c cmp r4, r1
+ 80013de: 428c cmp r4, r1
bcc CopyDataInit
- 8001170: d3f9 bcc.n 8001166
+ 80013e0: d3f9 bcc.n 80013d6
/* Zero fill the bss segment. */
ldr r2, =_sbss
- 8001172: 4a0a ldr r2, [pc, #40] ; (800119c )
+ 80013e2: 4a0a ldr r2, [pc, #40] ; (800140c )
ldr r4, =_ebss
- 8001174: 4c0a ldr r4, [pc, #40] ; (80011a0 )
+ 80013e4: 4c0a ldr r4, [pc, #40] ; (8001410 )
movs r3, #0
- 8001176: 2300 movs r3, #0
+ 80013e6: 2300 movs r3, #0
b LoopFillZerobss
- 8001178: e001 b.n 800117e
+ 80013e8: e001 b.n 80013ee
-0800117a :
+080013ea :
FillZerobss:
str r3, [r2]
- 800117a: 6013 str r3, [r2, #0]
+ 80013ea: 6013 str r3, [r2, #0]
adds r2, r2, #4
- 800117c: 3204 adds r2, #4
+ 80013ec: 3204 adds r2, #4
-0800117e :
+080013ee :
LoopFillZerobss:
cmp r2, r4
- 800117e: 42a2 cmp r2, r4
+ 80013ee: 42a2 cmp r2, r4
bcc FillZerobss
- 8001180: d3fb bcc.n 800117a
+ 80013f0: d3fb bcc.n 80013ea
/* Call static constructors */
bl __libc_init_array
- 8001182: f00e fe35 bl 800fdf0 <__libc_init_array>
+ 80013f2: f00e ff8b bl 801030c <__libc_init_array>
/* Call the application's entry point.*/
bl main
- 8001186: f7ff fea1 bl 8000ecc
+ 80013f6: f7ff fd69 bl 8000ecc
-0800118a :
+080013fa :
LoopForever:
b LoopForever
- 800118a: e7fe b.n 800118a
+ 80013fa: e7fe b.n 80013fa
ldr r0, =_estack
- 800118c: 20030000 .word 0x20030000
+ 80013fc: 20030000 .word 0x20030000
ldr r0, =_sdata
- 8001190: 20000000 .word 0x20000000
+ 8001400: 20000000 .word 0x20000000
ldr r1, =_edata
- 8001194: 200009e0 .word 0x200009e0
+ 8001404: 200009e0 .word 0x200009e0
ldr r2, =_sidata
- 8001198: 08017c88 .word 0x08017c88
+ 8001408: 080181a0 .word 0x080181a0
ldr r2, =_sbss
- 800119c: 200009e0 .word 0x200009e0
+ 800140c: 200009e0 .word 0x200009e0
ldr r4, =_ebss
- 80011a0: 20008d7c .word 0x20008d7c
+ 8001410: 20008dd0 .word 0x20008dd0
-080011a4 :
+08001414 :
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
- 80011a4: e7fe b.n 80011a4
+ 8001414: e7fe b.n 8001414
-080011a6 :
+08001416 :
* @param ioctx: holds device IO functions.
* @retval DP83848_STATUS_OK if OK
* DP83848_STATUS_ERROR if missing mandatory function
*/
int32_t DP83848_RegisterBusIO(dp83848_Object_t *pObj, dp83848_IOCtx_t *ioctx)
{
- 80011a6: b480 push {r7}
- 80011a8: b083 sub sp, #12
- 80011aa: af00 add r7, sp, #0
- 80011ac: 6078 str r0, [r7, #4]
- 80011ae: 6039 str r1, [r7, #0]
+ 8001416: b480 push {r7}
+ 8001418: b083 sub sp, #12
+ 800141a: af00 add r7, sp, #0
+ 800141c: 6078 str r0, [r7, #4]
+ 800141e: 6039 str r1, [r7, #0]
if(!pObj || !ioctx->ReadReg || !ioctx->WriteReg || !ioctx->GetTick)
- 80011b0: 687b ldr r3, [r7, #4]
- 80011b2: 2b00 cmp r3, #0
- 80011b4: d00b beq.n 80011ce
- 80011b6: 683b ldr r3, [r7, #0]
- 80011b8: 68db ldr r3, [r3, #12]
- 80011ba: 2b00 cmp r3, #0
- 80011bc: d007 beq.n 80011ce
- 80011be: 683b ldr r3, [r7, #0]
- 80011c0: 689b ldr r3, [r3, #8]
- 80011c2: 2b00 cmp r3, #0
- 80011c4: d003 beq.n 80011ce
- 80011c6: 683b ldr r3, [r7, #0]
- 80011c8: 691b ldr r3, [r3, #16]
- 80011ca: 2b00 cmp r3, #0
- 80011cc: d102 bne.n 80011d4
+ 8001420: 687b ldr r3, [r7, #4]
+ 8001422: 2b00 cmp r3, #0
+ 8001424: d00b beq.n 800143e
+ 8001426: 683b ldr r3, [r7, #0]
+ 8001428: 68db ldr r3, [r3, #12]
+ 800142a: 2b00 cmp r3, #0
+ 800142c: d007 beq.n 800143e
+ 800142e: 683b ldr r3, [r7, #0]
+ 8001430: 689b ldr r3, [r3, #8]
+ 8001432: 2b00 cmp r3, #0
+ 8001434: d003 beq.n 800143e
+ 8001436: 683b ldr r3, [r7, #0]
+ 8001438: 691b ldr r3, [r3, #16]
+ 800143a: 2b00 cmp r3, #0
+ 800143c: d102 bne.n 8001444
{
return DP83848_STATUS_ERROR;
- 80011ce: f04f 33ff mov.w r3, #4294967295
- 80011d2: e014 b.n 80011fe
+ 800143e: f04f 33ff mov.w r3, #4294967295
+ 8001442: e014 b.n 800146e
}
pObj->IO.Init = ioctx->Init;
- 80011d4: 683b ldr r3, [r7, #0]
- 80011d6: 681a ldr r2, [r3, #0]
- 80011d8: 687b ldr r3, [r7, #4]
- 80011da: 609a str r2, [r3, #8]
+ 8001444: 683b ldr r3, [r7, #0]
+ 8001446: 681a ldr r2, [r3, #0]
+ 8001448: 687b ldr r3, [r7, #4]
+ 800144a: 609a str r2, [r3, #8]
pObj->IO.DeInit = ioctx->DeInit;
- 80011dc: 683b ldr r3, [r7, #0]
- 80011de: 685a ldr r2, [r3, #4]
- 80011e0: 687b ldr r3, [r7, #4]
- 80011e2: 60da str r2, [r3, #12]
+ 800144c: 683b ldr r3, [r7, #0]
+ 800144e: 685a ldr r2, [r3, #4]
+ 8001450: 687b ldr r3, [r7, #4]
+ 8001452: 60da str r2, [r3, #12]
pObj->IO.ReadReg = ioctx->ReadReg;
- 80011e4: 683b ldr r3, [r7, #0]
- 80011e6: 68da ldr r2, [r3, #12]
- 80011e8: 687b ldr r3, [r7, #4]
- 80011ea: 615a str r2, [r3, #20]
+ 8001454: 683b ldr r3, [r7, #0]
+ 8001456: 68da ldr r2, [r3, #12]
+ 8001458: 687b ldr r3, [r7, #4]
+ 800145a: 615a str r2, [r3, #20]
pObj->IO.WriteReg = ioctx->WriteReg;
- 80011ec: 683b ldr r3, [r7, #0]
- 80011ee: 689a ldr r2, [r3, #8]
- 80011f0: 687b ldr r3, [r7, #4]
- 80011f2: 611a str r2, [r3, #16]
+ 800145c: 683b ldr r3, [r7, #0]
+ 800145e: 689a ldr r2, [r3, #8]
+ 8001460: 687b ldr r3, [r7, #4]
+ 8001462: 611a str r2, [r3, #16]
pObj->IO.GetTick = ioctx->GetTick;
- 80011f4: 683b ldr r3, [r7, #0]
- 80011f6: 691a ldr r2, [r3, #16]
- 80011f8: 687b ldr r3, [r7, #4]
- 80011fa: 619a str r2, [r3, #24]
+ 8001464: 683b ldr r3, [r7, #0]
+ 8001466: 691a ldr r2, [r3, #16]
+ 8001468: 687b ldr r3, [r7, #4]
+ 800146a: 619a str r2, [r3, #24]
return DP83848_STATUS_OK;
- 80011fc: 2300 movs r3, #0
+ 800146c: 2300 movs r3, #0
}
- 80011fe: 4618 mov r0, r3
- 8001200: 370c adds r7, #12
- 8001202: 46bd mov sp, r7
- 8001204: f85d 7b04 ldr.w r7, [sp], #4
- 8001208: 4770 bx lr
+ 800146e: 4618 mov r0, r3
+ 8001470: 370c adds r7, #12
+ 8001472: 46bd mov sp, r7
+ 8001474: f85d 7b04 ldr.w r7, [sp], #4
+ 8001478: 4770 bx lr
-0800120a :
+0800147a :
* DP83848_STATUS_READ_ERROR if connot read register
* DP83848_STATUS_WRITE_ERROR if connot write to register
* DP83848_STATUS_RESET_TIMEOUT if cannot perform a software reset
*/
int32_t DP83848_Init(dp83848_Object_t *pObj)
{
- 800120a: b580 push {r7, lr}
- 800120c: b086 sub sp, #24
- 800120e: af00 add r7, sp, #0
- 8001210: 6078 str r0, [r7, #4]
+ 800147a: b580 push {r7, lr}
+ 800147c: b086 sub sp, #24
+ 800147e: af00 add r7, sp, #0
+ 8001480: 6078 str r0, [r7, #4]
uint32_t tickstart = 0, regvalue = 0, addr = 0;
- 8001212: 2300 movs r3, #0
- 8001214: 60fb str r3, [r7, #12]
- 8001216: 2300 movs r3, #0
- 8001218: 60bb str r3, [r7, #8]
- 800121a: 2300 movs r3, #0
- 800121c: 617b str r3, [r7, #20]
+ 8001482: 2300 movs r3, #0
+ 8001484: 60fb str r3, [r7, #12]
+ 8001486: 2300 movs r3, #0
+ 8001488: 60bb str r3, [r7, #8]
+ 800148a: 2300 movs r3, #0
+ 800148c: 617b str r3, [r7, #20]
int32_t status = DP83848_STATUS_OK;
- 800121e: 2300 movs r3, #0
- 8001220: 613b str r3, [r7, #16]
+ 800148e: 2300 movs r3, #0
+ 8001490: 613b str r3, [r7, #16]
if(pObj->Is_Initialized == 0)
- 8001222: 687b ldr r3, [r7, #4]
- 8001224: 685b ldr r3, [r3, #4]
- 8001226: 2b00 cmp r3, #0
- 8001228: d17c bne.n 8001324
+ 8001492: 687b ldr r3, [r7, #4]
+ 8001494: 685b ldr r3, [r3, #4]
+ 8001496: 2b00 cmp r3, #0
+ 8001498: d17c bne.n 8001594
{
if(pObj->IO.Init != 0)
- 800122a: 687b ldr r3, [r7, #4]
- 800122c: 689b ldr r3, [r3, #8]
- 800122e: 2b00 cmp r3, #0
- 8001230: d002 beq.n 8001238
+ 800149a: 687b ldr r3, [r7, #4]
+ 800149c: 689b ldr r3, [r3, #8]
+ 800149e: 2b00 cmp r3, #0
+ 80014a0: d002 beq.n 80014a8
{
/* GPIO and Clocks initialization */
pObj->IO.Init();
- 8001232: 687b ldr r3, [r7, #4]
- 8001234: 689b ldr r3, [r3, #8]
- 8001236: 4798 blx r3
+ 80014a2: 687b ldr r3, [r7, #4]
+ 80014a4: 689b ldr r3, [r3, #8]
+ 80014a6: 4798 blx r3
}
/* for later check */
pObj->DevAddr = DP83848_MAX_DEV_ADDR + 1;
- 8001238: 687b ldr r3, [r7, #4]
- 800123a: 2220 movs r2, #32
- 800123c: 601a str r2, [r3, #0]
+ 80014a8: 687b ldr r3, [r7, #4]
+ 80014aa: 2220 movs r2, #32
+ 80014ac: 601a str r2, [r3, #0]
/* Get the device address from special mode register */
for(addr = 0; addr <= DP83848_MAX_DEV_ADDR; addr ++)
- 800123e: 2300 movs r3, #0
- 8001240: 617b str r3, [r7, #20]
- 8001242: e01c b.n 800127e
+ 80014ae: 2300 movs r3, #0
+ 80014b0: 617b str r3, [r7, #20]
+ 80014b2: e01c b.n 80014ee
{
if(pObj->IO.ReadReg(addr, DP83848_SMR, ®value) < 0)
- 8001244: 687b ldr r3, [r7, #4]
- 8001246: 695b ldr r3, [r3, #20]
- 8001248: f107 0208 add.w r2, r7, #8
- 800124c: 2119 movs r1, #25
- 800124e: 6978 ldr r0, [r7, #20]
- 8001250: 4798 blx r3
- 8001252: 4603 mov r3, r0
- 8001254: 2b00 cmp r3, #0
- 8001256: da03 bge.n 8001260
+ 80014b4: 687b ldr r3, [r7, #4]
+ 80014b6: 695b ldr r3, [r3, #20]
+ 80014b8: f107 0208 add.w r2, r7, #8
+ 80014bc: 2119 movs r1, #25
+ 80014be: 6978 ldr r0, [r7, #20]
+ 80014c0: 4798 blx r3
+ 80014c2: 4603 mov r3, r0
+ 80014c4: 2b00 cmp r3, #0
+ 80014c6: da03 bge.n 80014d0
{
status = DP83848_STATUS_READ_ERROR;
- 8001258: f06f 0304 mvn.w r3, #4
- 800125c: 613b str r3, [r7, #16]
+ 80014c8: f06f 0304 mvn.w r3, #4
+ 80014cc: 613b str r3, [r7, #16]
/* Can't read from this device address
continue with next address */
continue;
- 800125e: e00b b.n 8001278
+ 80014ce: e00b b.n 80014e8
}
if((regvalue & DP83848_SMR_PHY_ADDR) == addr)
- 8001260: 68bb ldr r3, [r7, #8]
- 8001262: f003 031f and.w r3, r3, #31
- 8001266: 697a ldr r2, [r7, #20]
- 8001268: 429a cmp r2, r3
- 800126a: d105 bne.n 8001278