diff --git a/.settings/stm32cubeide.project.prefs b/.settings/stm32cubeide.project.prefs index 75bfd87..571fca3 100644 --- a/.settings/stm32cubeide.project.prefs +++ b/.settings/stm32cubeide.project.prefs @@ -1,3 +1,3 @@ -8DF89ED150041C4CBC7CB9A9CAA90856=0B1859B3A11EA2A685DA180DE4A27465 -DC22A860405A8BF2F2C095E5B6529F12=D67572DC8315FE97C2A0CA1F27973D95 +8DF89ED150041C4CBC7CB9A9CAA90856=9AFB812F158C9DD317CF4A0162C2C562 +DC22A860405A8BF2F2C095E5B6529F12=BC1D3813326910BA982886FF9923D208 eclipse.preferences.version=1 diff --git a/Core/Inc/main.h b/Core/Inc/main.h index 3156d2e..3393e6e 100644 --- a/Core/Inc/main.h +++ b/Core/Inc/main.h @@ -58,7 +58,8 @@ void Error_Handler(void); /* Private defines -----------------------------------------------------------*/ /* USER CODE BEGIN Private defines */ - +#define ISA_BASE_RD 0x20000U +#define ISA_BASE_WR 0U /* USER CODE END Private defines */ #ifdef __cplusplus @@ -67,5 +68,4 @@ void Error_Handler(void); #endif /* __MAIN_H */ -#define ISA_BASE_RD 0x20000U -#define ISA_BASE_WR 0U + diff --git a/Core/Src/main.c b/Core/Src/main.c index e3b75d3..b6cb49c 100644 --- a/Core/Src/main.c +++ b/Core/Src/main.c @@ -50,10 +50,10 @@ SRAM_HandleTypeDef hsram1; void SystemClock_Config(void); static void MX_GPIO_Init(void); static void MX_FMC_Init(void); + +/* USER CODE BEGIN PFP */ void write_isa(uint16_t addr, uint16_t data); uint16_t read_isa(uint16_t addr); -/* USER CODE BEGIN PFP */ - /* USER CODE END PFP */ /* Private user code ---------------------------------------------------------*/ @@ -107,16 +107,6 @@ int main(void) /* USER CODE END 3 */ } -uint16_t read_isa(uint16_t addr) -{ - return *(uint16_t*)(ISA_BASE_RD + addr); -} - -void write_isa(uint16_t addr, uint16_t data) -{ - *(uint16_t*)(ISA_BASE_WR + addr) = data; -} - /** * @brief System Clock Configuration * @retval None @@ -248,7 +238,15 @@ static void MX_GPIO_Init(void) } /* USER CODE BEGIN 4 */ +uint16_t read_isa(uint16_t addr) +{ + return *(uint16_t*)(ISA_BASE_RD + addr); +} +void write_isa(uint16_t addr, uint16_t data) +{ + *(uint16_t*)(ISA_BASE_WR + addr) = data; +} /* USER CODE END 4 */ /** diff --git a/Debug/yau-07b.list b/Debug/yau-07b.list index 8743177..46f595f 100644 --- a/Debug/yau-07b.list +++ b/Debug/yau-07b.list @@ -37,19 +37,19 @@ Idx Name Size VMA LMA File off Algn CONTENTS, READONLY, DEBUGGING, OCTETS 16 .debug_ranges 00001308 00000000 00000000 00052240 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS - 17 .debug_macro 0002ebef 00000000 00000000 00053548 2**0 + 17 .debug_macro 0002ec5f 00000000 00000000 00053548 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 18 .debug_line 000202ea 00000000 00000000 00082137 2**0 + 18 .debug_line 000202ea 00000000 00000000 000821a7 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 19 .debug_str 000ec4ae 00000000 00000000 000a2421 2**0 + 19 .debug_str 000ec3e9 00000000 00000000 000a2491 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 20 .comment 00000050 00000000 00000000 0018e8cf 2**0 + 20 .comment 00000050 00000000 00000000 0018e87a 2**0 CONTENTS, READONLY - 21 .debug_frame 00006304 00000000 00000000 0018e920 2**2 + 21 .debug_frame 00006304 00000000 00000000 0018e8cc 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS - 22 .stab 000000cc 00000000 00000000 00194c24 2**2 + 22 .stab 000000cc 00000000 00000000 00194bd0 2**2 CONTENTS, READONLY, DEBUGGING - 23 .stabstr 000001b9 00000000 00000000 00194cf0 2**0 + 23 .stabstr 000001b9 00000000 00000000 00194c9c 2**0 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: @@ -1234,18 +1234,18 @@ int main(void) /* Configure the system clock */ SystemClock_Config(); - 8000ed4: f000 f83a bl 8000f4c + 8000ed4: f000 f81a bl 8000f0c /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); - 8000ed8: f000 f906 bl 80010e8 + 8000ed8: f000 f8e6 bl 80010a8 MX_LWIP_Init(); 8000edc: f002 fdba bl 8003a54 MX_FMC_Init(); - 8000ee0: f000 f8a0 bl 8001024 + 8000ee0: f000 f880 bl 8000fe4 /* Infinite loop */ /* USER CODE BEGIN 3 */ @@ -1256,518 +1256,516 @@ int main(void) write_isa(0x100, 0xaaaa); 8000ee8: f64a 21aa movw r1, #43690 ; 0xaaaa 8000eec: f44f 7080 mov.w r0, #256 ; 0x100 - 8000ef0: f000 f81a bl 8000f28 + 8000ef0: f000 f973 bl 80011da write_isa(0x100, 0x5555); 8000ef4: f245 5155 movw r1, #21845 ; 0x5555 8000ef8: f44f 7080 mov.w r0, #256 ; 0x100 - 8000efc: f000 f814 bl 8000f28 + 8000efc: f000 f96d bl 80011da read_isa(0x100); 8000f00: f44f 7080 mov.w r0, #256 ; 0x100 - 8000f04: f000 f801 bl 8000f0a + 8000f04: f000 f95a bl 80011bc MX_LWIP_Process(); 8000f08: e7ec b.n 8000ee4 + ... -08000f0a : - } - /* USER CODE END 3 */ -} - -uint16_t read_isa(uint16_t addr) -{ - 8000f0a: b480 push {r7} - 8000f0c: b083 sub sp, #12 - 8000f0e: af00 add r7, sp, #0 - 8000f10: 4603 mov r3, r0 - 8000f12: 80fb strh r3, [r7, #6] - return *(uint16_t*)(ISA_BASE_RD + addr); - 8000f14: 88fb ldrh r3, [r7, #6] - 8000f16: f503 3300 add.w r3, r3, #131072 ; 0x20000 - 8000f1a: 881b ldrh r3, [r3, #0] -} - 8000f1c: 4618 mov r0, r3 - 8000f1e: 370c adds r7, #12 - 8000f20: 46bd mov sp, r7 - 8000f22: f85d 7b04 ldr.w r7, [sp], #4 - 8000f26: 4770 bx lr - -08000f28 : - -void write_isa(uint16_t addr, uint16_t data) -{ - 8000f28: b480 push {r7} - 8000f2a: b083 sub sp, #12 - 8000f2c: af00 add r7, sp, #0 - 8000f2e: 4603 mov r3, r0 - 8000f30: 460a mov r2, r1 - 8000f32: 80fb strh r3, [r7, #6] - 8000f34: 4613 mov r3, r2 - 8000f36: 80bb strh r3, [r7, #4] - *(uint16_t*)(ISA_BASE_WR + addr) = data; - 8000f38: 88fb ldrh r3, [r7, #6] - 8000f3a: 461a mov r2, r3 - 8000f3c: 88bb ldrh r3, [r7, #4] - 8000f3e: 8013 strh r3, [r2, #0] -} - 8000f40: bf00 nop - 8000f42: 370c adds r7, #12 - 8000f44: 46bd mov sp, r7 - 8000f46: f85d 7b04 ldr.w r7, [sp], #4 - 8000f4a: 4770 bx lr - -08000f4c : +08000f0c : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { - 8000f4c: b580 push {r7, lr} - 8000f4e: b094 sub sp, #80 ; 0x50 - 8000f50: af00 add r7, sp, #0 + 8000f0c: b580 push {r7, lr} + 8000f0e: b094 sub sp, #80 ; 0x50 + 8000f10: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 8000f52: f107 0320 add.w r3, r7, #32 - 8000f56: 2230 movs r2, #48 ; 0x30 - 8000f58: 2100 movs r1, #0 - 8000f5a: 4618 mov r0, r3 - 8000f5c: f00f fa32 bl 80103c4 + 8000f12: f107 0320 add.w r3, r7, #32 + 8000f16: 2230 movs r2, #48 ; 0x30 + 8000f18: 2100 movs r1, #0 + 8000f1a: 4618 mov r0, r3 + 8000f1c: f00f fa52 bl 80103c4 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 8000f60: f107 030c add.w r3, r7, #12 - 8000f64: 2200 movs r2, #0 - 8000f66: 601a str r2, [r3, #0] - 8000f68: 605a str r2, [r3, #4] - 8000f6a: 609a str r2, [r3, #8] - 8000f6c: 60da str r2, [r3, #12] - 8000f6e: 611a str r2, [r3, #16] + 8000f20: f107 030c add.w r3, r7, #12 + 8000f24: 2200 movs r2, #0 + 8000f26: 601a str r2, [r3, #0] + 8000f28: 605a str r2, [r3, #4] + 8000f2a: 609a str r2, [r3, #8] + 8000f2c: 60da str r2, [r3, #12] + 8000f2e: 611a str r2, [r3, #16] /** Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); - 8000f70: 2300 movs r3, #0 - 8000f72: 60bb str r3, [r7, #8] - 8000f74: 4b29 ldr r3, [pc, #164] ; (800101c ) - 8000f76: 6c1b ldr r3, [r3, #64] ; 0x40 - 8000f78: 4a28 ldr r2, [pc, #160] ; (800101c ) - 8000f7a: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 8000f7e: 6413 str r3, [r2, #64] ; 0x40 - 8000f80: 4b26 ldr r3, [pc, #152] ; (800101c ) - 8000f82: 6c1b ldr r3, [r3, #64] ; 0x40 - 8000f84: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8000f88: 60bb str r3, [r7, #8] - 8000f8a: 68bb ldr r3, [r7, #8] + 8000f30: 2300 movs r3, #0 + 8000f32: 60bb str r3, [r7, #8] + 8000f34: 4b29 ldr r3, [pc, #164] ; (8000fdc ) + 8000f36: 6c1b ldr r3, [r3, #64] ; 0x40 + 8000f38: 4a28 ldr r2, [pc, #160] ; (8000fdc ) + 8000f3a: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 + 8000f3e: 6413 str r3, [r2, #64] ; 0x40 + 8000f40: 4b26 ldr r3, [pc, #152] ; (8000fdc ) + 8000f42: 6c1b ldr r3, [r3, #64] ; 0x40 + 8000f44: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 8000f48: 60bb str r3, [r7, #8] + 8000f4a: 68bb ldr r3, [r7, #8] __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3); - 8000f8c: 2300 movs r3, #0 - 8000f8e: 607b str r3, [r7, #4] - 8000f90: 4b23 ldr r3, [pc, #140] ; (8001020 ) - 8000f92: 681b ldr r3, [r3, #0] - 8000f94: f423 4340 bic.w r3, r3, #49152 ; 0xc000 - 8000f98: 4a21 ldr r2, [pc, #132] ; (8001020 ) - 8000f9a: f443 4380 orr.w r3, r3, #16384 ; 0x4000 - 8000f9e: 6013 str r3, [r2, #0] - 8000fa0: 4b1f ldr r3, [pc, #124] ; (8001020 ) - 8000fa2: 681b ldr r3, [r3, #0] - 8000fa4: f403 4340 and.w r3, r3, #49152 ; 0xc000 - 8000fa8: 607b str r3, [r7, #4] - 8000faa: 687b ldr r3, [r7, #4] + 8000f4c: 2300 movs r3, #0 + 8000f4e: 607b str r3, [r7, #4] + 8000f50: 4b23 ldr r3, [pc, #140] ; (8000fe0 ) + 8000f52: 681b ldr r3, [r3, #0] + 8000f54: f423 4340 bic.w r3, r3, #49152 ; 0xc000 + 8000f58: 4a21 ldr r2, [pc, #132] ; (8000fe0 ) + 8000f5a: f443 4380 orr.w r3, r3, #16384 ; 0x4000 + 8000f5e: 6013 str r3, [r2, #0] + 8000f60: 4b1f ldr r3, [pc, #124] ; (8000fe0 ) + 8000f62: 681b ldr r3, [r3, #0] + 8000f64: f403 4340 and.w r3, r3, #49152 ; 0xc000 + 8000f68: 607b str r3, [r7, #4] + 8000f6a: 687b ldr r3, [r7, #4] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; - 8000fac: 2302 movs r3, #2 - 8000fae: 623b str r3, [r7, #32] + 8000f6c: 2302 movs r3, #2 + 8000f6e: 623b str r3, [r7, #32] RCC_OscInitStruct.HSIState = RCC_HSI_ON; - 8000fb0: 2301 movs r3, #1 - 8000fb2: 62fb str r3, [r7, #44] ; 0x2c + 8000f70: 2301 movs r3, #1 + 8000f72: 62fb str r3, [r7, #44] ; 0x2c RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; - 8000fb4: 2310 movs r3, #16 - 8000fb6: 633b str r3, [r7, #48] ; 0x30 + 8000f74: 2310 movs r3, #16 + 8000f76: 633b str r3, [r7, #48] ; 0x30 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 8000fb8: 2302 movs r3, #2 - 8000fba: 63bb str r3, [r7, #56] ; 0x38 + 8000f78: 2302 movs r3, #2 + 8000f7a: 63bb str r3, [r7, #56] ; 0x38 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; - 8000fbc: 2300 movs r3, #0 - 8000fbe: 63fb str r3, [r7, #60] ; 0x3c + 8000f7c: 2300 movs r3, #0 + 8000f7e: 63fb str r3, [r7, #60] ; 0x3c RCC_OscInitStruct.PLL.PLLM = 8; - 8000fc0: 2308 movs r3, #8 - 8000fc2: 643b str r3, [r7, #64] ; 0x40 + 8000f80: 2308 movs r3, #8 + 8000f82: 643b str r3, [r7, #64] ; 0x40 RCC_OscInitStruct.PLL.PLLN = 100; - 8000fc4: 2364 movs r3, #100 ; 0x64 - 8000fc6: 647b str r3, [r7, #68] ; 0x44 + 8000f84: 2364 movs r3, #100 ; 0x64 + 8000f86: 647b str r3, [r7, #68] ; 0x44 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - 8000fc8: 2302 movs r3, #2 - 8000fca: 64bb str r3, [r7, #72] ; 0x48 + 8000f88: 2302 movs r3, #2 + 8000f8a: 64bb str r3, [r7, #72] ; 0x48 RCC_OscInitStruct.PLL.PLLQ = 4; - 8000fcc: 2304 movs r3, #4 - 8000fce: 64fb str r3, [r7, #76] ; 0x4c + 8000f8c: 2304 movs r3, #4 + 8000f8e: 64fb str r3, [r7, #76] ; 0x4c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 8000fd0: f107 0320 add.w r3, r7, #32 - 8000fd4: 4618 mov r0, r3 - 8000fd6: f001 ffb7 bl 8002f48 - 8000fda: 4603 mov r3, r0 - 8000fdc: 2b00 cmp r3, #0 - 8000fde: d001 beq.n 8000fe4 + 8000f90: f107 0320 add.w r3, r7, #32 + 8000f94: 4618 mov r0, r3 + 8000f96: f001 ffd7 bl 8002f48 + 8000f9a: 4603 mov r3, r0 + 8000f9c: 2b00 cmp r3, #0 + 8000f9e: d001 beq.n 8000fa4 { Error_Handler(); - 8000fe0: f000 f90c bl 80011fc + 8000fa0: f000 f92d bl 80011fe } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 8000fe4: 230f movs r3, #15 - 8000fe6: 60fb str r3, [r7, #12] + 8000fa4: 230f movs r3, #15 + 8000fa6: 60fb str r3, [r7, #12] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - 8000fe8: 2302 movs r3, #2 - 8000fea: 613b str r3, [r7, #16] + 8000fa8: 2302 movs r3, #2 + 8000faa: 613b str r3, [r7, #16] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 8000fec: 2300 movs r3, #0 - 8000fee: 617b str r3, [r7, #20] + 8000fac: 2300 movs r3, #0 + 8000fae: 617b str r3, [r7, #20] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - 8000ff0: f44f 53a0 mov.w r3, #5120 ; 0x1400 - 8000ff4: 61bb str r3, [r7, #24] + 8000fb0: f44f 53a0 mov.w r3, #5120 ; 0x1400 + 8000fb4: 61bb str r3, [r7, #24] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - 8000ff6: f44f 5380 mov.w r3, #4096 ; 0x1000 - 8000ffa: 61fb str r3, [r7, #28] + 8000fb6: f44f 5380 mov.w r3, #4096 ; 0x1000 + 8000fba: 61fb str r3, [r7, #28] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) - 8000ffc: f107 030c add.w r3, r7, #12 - 8001000: 2103 movs r1, #3 - 8001002: 4618 mov r0, r3 - 8001004: f002 fa18 bl 8003438 - 8001008: 4603 mov r3, r0 - 800100a: 2b00 cmp r3, #0 - 800100c: d001 beq.n 8001012 + 8000fbc: f107 030c add.w r3, r7, #12 + 8000fc0: 2103 movs r1, #3 + 8000fc2: 4618 mov r0, r3 + 8000fc4: f002 fa38 bl 8003438 + 8000fc8: 4603 mov r3, r0 + 8000fca: 2b00 cmp r3, #0 + 8000fcc: d001 beq.n 8000fd2 { Error_Handler(); - 800100e: f000 f8f5 bl 80011fc + 8000fce: f000 f916 bl 80011fe } } - 8001012: bf00 nop - 8001014: 3750 adds r7, #80 ; 0x50 - 8001016: 46bd mov sp, r7 - 8001018: bd80 pop {r7, pc} - 800101a: bf00 nop - 800101c: 40023800 .word 0x40023800 - 8001020: 40007000 .word 0x40007000 + 8000fd2: bf00 nop + 8000fd4: 3750 adds r7, #80 ; 0x50 + 8000fd6: 46bd mov sp, r7 + 8000fd8: bd80 pop {r7, pc} + 8000fda: bf00 nop + 8000fdc: 40023800 .word 0x40023800 + 8000fe0: 40007000 .word 0x40007000 -08001024 : +08000fe4 : /* FMC initialization function */ static void MX_FMC_Init(void) { - 8001024: b580 push {r7, lr} - 8001026: b088 sub sp, #32 - 8001028: af00 add r7, sp, #0 + 8000fe4: b580 push {r7, lr} + 8000fe6: b088 sub sp, #32 + 8000fe8: af00 add r7, sp, #0 /* USER CODE BEGIN FMC_Init 0 */ /* USER CODE END FMC_Init 0 */ FMC_NORSRAM_TimingTypeDef Timing = {0}; - 800102a: 1d3b adds r3, r7, #4 - 800102c: 2200 movs r2, #0 - 800102e: 601a str r2, [r3, #0] - 8001030: 605a str r2, [r3, #4] - 8001032: 609a str r2, [r3, #8] - 8001034: 60da str r2, [r3, #12] - 8001036: 611a str r2, [r3, #16] - 8001038: 615a str r2, [r3, #20] - 800103a: 619a str r2, [r3, #24] + 8000fea: 1d3b adds r3, r7, #4 + 8000fec: 2200 movs r2, #0 + 8000fee: 601a str r2, [r3, #0] + 8000ff0: 605a str r2, [r3, #4] + 8000ff2: 609a str r2, [r3, #8] + 8000ff4: 60da str r2, [r3, #12] + 8000ff6: 611a str r2, [r3, #16] + 8000ff8: 615a str r2, [r3, #20] + 8000ffa: 619a str r2, [r3, #24] /* USER CODE END FMC_Init 1 */ /** Perform the SRAM1 memory initialization sequence */ hsram1.Instance = FMC_NORSRAM_DEVICE; - 800103c: 4b28 ldr r3, [pc, #160] ; (80010e0 ) - 800103e: f04f 4220 mov.w r2, #2684354560 ; 0xa0000000 - 8001042: 601a str r2, [r3, #0] + 8000ffc: 4b28 ldr r3, [pc, #160] ; (80010a0 ) + 8000ffe: f04f 4220 mov.w r2, #2684354560 ; 0xa0000000 + 8001002: 601a str r2, [r3, #0] hsram1.Extended = FMC_NORSRAM_EXTENDED_DEVICE; - 8001044: 4b26 ldr r3, [pc, #152] ; (80010e0 ) - 8001046: 4a27 ldr r2, [pc, #156] ; (80010e4 ) - 8001048: 605a str r2, [r3, #4] + 8001004: 4b26 ldr r3, [pc, #152] ; (80010a0 ) + 8001006: 4a27 ldr r2, [pc, #156] ; (80010a4 ) + 8001008: 605a str r2, [r3, #4] /* hsram1.Init */ hsram1.Init.NSBank = FMC_NORSRAM_BANK1; - 800104a: 4b25 ldr r3, [pc, #148] ; (80010e0 ) - 800104c: 2200 movs r2, #0 - 800104e: 609a str r2, [r3, #8] + 800100a: 4b25 ldr r3, [pc, #148] ; (80010a0 ) + 800100c: 2200 movs r2, #0 + 800100e: 609a str r2, [r3, #8] hsram1.Init.DataAddressMux = FMC_DATA_ADDRESS_MUX_DISABLE; - 8001050: 4b23 ldr r3, [pc, #140] ; (80010e0 ) - 8001052: 2200 movs r2, #0 - 8001054: 60da str r2, [r3, #12] + 8001010: 4b23 ldr r3, [pc, #140] ; (80010a0 ) + 8001012: 2200 movs r2, #0 + 8001014: 60da str r2, [r3, #12] hsram1.Init.MemoryType = FMC_MEMORY_TYPE_SRAM; - 8001056: 4b22 ldr r3, [pc, #136] ; (80010e0 ) - 8001058: 2200 movs r2, #0 - 800105a: 611a str r2, [r3, #16] + 8001016: 4b22 ldr r3, [pc, #136] ; (80010a0 ) + 8001018: 2200 movs r2, #0 + 800101a: 611a str r2, [r3, #16] hsram1.Init.MemoryDataWidth = FMC_NORSRAM_MEM_BUS_WIDTH_16; - 800105c: 4b20 ldr r3, [pc, #128] ; (80010e0 ) - 800105e: 2210 movs r2, #16 - 8001060: 615a str r2, [r3, #20] + 800101c: 4b20 ldr r3, [pc, #128] ; (80010a0 ) + 800101e: 2210 movs r2, #16 + 8001020: 615a str r2, [r3, #20] hsram1.Init.BurstAccessMode = FMC_BURST_ACCESS_MODE_DISABLE; - 8001062: 4b1f ldr r3, [pc, #124] ; (80010e0 ) - 8001064: 2200 movs r2, #0 - 8001066: 619a str r2, [r3, #24] + 8001022: 4b1f ldr r3, [pc, #124] ; (80010a0 ) + 8001024: 2200 movs r2, #0 + 8001026: 619a str r2, [r3, #24] hsram1.Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_LOW; - 8001068: 4b1d ldr r3, [pc, #116] ; (80010e0 ) - 800106a: 2200 movs r2, #0 - 800106c: 61da str r2, [r3, #28] + 8001028: 4b1d ldr r3, [pc, #116] ; (80010a0 ) + 800102a: 2200 movs r2, #0 + 800102c: 61da str r2, [r3, #28] hsram1.Init.WrapMode = FMC_WRAP_MODE_DISABLE; - 800106e: 4b1c ldr r3, [pc, #112] ; (80010e0 ) - 8001070: 2200 movs r2, #0 - 8001072: 621a str r2, [r3, #32] + 800102e: 4b1c ldr r3, [pc, #112] ; (80010a0 ) + 8001030: 2200 movs r2, #0 + 8001032: 621a str r2, [r3, #32] hsram1.Init.WaitSignalActive = FMC_WAIT_TIMING_BEFORE_WS; - 8001074: 4b1a ldr r3, [pc, #104] ; (80010e0 ) - 8001076: 2200 movs r2, #0 - 8001078: 625a str r2, [r3, #36] ; 0x24 + 8001034: 4b1a ldr r3, [pc, #104] ; (80010a0 ) + 8001036: 2200 movs r2, #0 + 8001038: 625a str r2, [r3, #36] ; 0x24 hsram1.Init.WriteOperation = FMC_WRITE_OPERATION_DISABLE; - 800107a: 4b19 ldr r3, [pc, #100] ; (80010e0 ) - 800107c: 2200 movs r2, #0 - 800107e: 629a str r2, [r3, #40] ; 0x28 + 800103a: 4b19 ldr r3, [pc, #100] ; (80010a0 ) + 800103c: 2200 movs r2, #0 + 800103e: 629a str r2, [r3, #40] ; 0x28 hsram1.Init.WaitSignal = FMC_WAIT_SIGNAL_DISABLE; - 8001080: 4b17 ldr r3, [pc, #92] ; (80010e0 ) - 8001082: 2200 movs r2, #0 - 8001084: 62da str r2, [r3, #44] ; 0x2c + 8001040: 4b17 ldr r3, [pc, #92] ; (80010a0 ) + 8001042: 2200 movs r2, #0 + 8001044: 62da str r2, [r3, #44] ; 0x2c hsram1.Init.ExtendedMode = FMC_EXTENDED_MODE_DISABLE; - 8001086: 4b16 ldr r3, [pc, #88] ; (80010e0 ) - 8001088: 2200 movs r2, #0 - 800108a: 631a str r2, [r3, #48] ; 0x30 + 8001046: 4b16 ldr r3, [pc, #88] ; (80010a0 ) + 8001048: 2200 movs r2, #0 + 800104a: 631a str r2, [r3, #48] ; 0x30 hsram1.Init.AsynchronousWait = FMC_ASYNCHRONOUS_WAIT_DISABLE; - 800108c: 4b14 ldr r3, [pc, #80] ; (80010e0 ) - 800108e: 2200 movs r2, #0 - 8001090: 635a str r2, [r3, #52] ; 0x34 + 800104c: 4b14 ldr r3, [pc, #80] ; (80010a0 ) + 800104e: 2200 movs r2, #0 + 8001050: 635a str r2, [r3, #52] ; 0x34 hsram1.Init.WriteBurst = FMC_WRITE_BURST_DISABLE; - 8001092: 4b13 ldr r3, [pc, #76] ; (80010e0 ) - 8001094: 2200 movs r2, #0 - 8001096: 639a str r2, [r3, #56] ; 0x38 + 8001052: 4b13 ldr r3, [pc, #76] ; (80010a0 ) + 8001054: 2200 movs r2, #0 + 8001056: 639a str r2, [r3, #56] ; 0x38 hsram1.Init.ContinuousClock = FMC_CONTINUOUS_CLOCK_SYNC_ONLY; - 8001098: 4b11 ldr r3, [pc, #68] ; (80010e0 ) - 800109a: 2200 movs r2, #0 - 800109c: 63da str r2, [r3, #60] ; 0x3c + 8001058: 4b11 ldr r3, [pc, #68] ; (80010a0 ) + 800105a: 2200 movs r2, #0 + 800105c: 63da str r2, [r3, #60] ; 0x3c hsram1.Init.PageSize = FMC_PAGE_SIZE_NONE; - 800109e: 4b10 ldr r3, [pc, #64] ; (80010e0 ) - 80010a0: 2200 movs r2, #0 - 80010a2: 645a str r2, [r3, #68] ; 0x44 + 800105e: 4b10 ldr r3, [pc, #64] ; (80010a0 ) + 8001060: 2200 movs r2, #0 + 8001062: 645a str r2, [r3, #68] ; 0x44 /* Timing */ Timing.AddressSetupTime = 15; - 80010a4: 230f movs r3, #15 - 80010a6: 607b str r3, [r7, #4] + 8001064: 230f movs r3, #15 + 8001066: 607b str r3, [r7, #4] Timing.AddressHoldTime = 15; - 80010a8: 230f movs r3, #15 - 80010aa: 60bb str r3, [r7, #8] + 8001068: 230f movs r3, #15 + 800106a: 60bb str r3, [r7, #8] Timing.DataSetupTime = 255; - 80010ac: 23ff movs r3, #255 ; 0xff - 80010ae: 60fb str r3, [r7, #12] + 800106c: 23ff movs r3, #255 ; 0xff + 800106e: 60fb str r3, [r7, #12] Timing.BusTurnAroundDuration = 15; - 80010b0: 230f movs r3, #15 - 80010b2: 613b str r3, [r7, #16] + 8001070: 230f movs r3, #15 + 8001072: 613b str r3, [r7, #16] Timing.CLKDivision = 16; - 80010b4: 2310 movs r3, #16 - 80010b6: 617b str r3, [r7, #20] + 8001074: 2310 movs r3, #16 + 8001076: 617b str r3, [r7, #20] Timing.DataLatency = 17; - 80010b8: 2311 movs r3, #17 - 80010ba: 61bb str r3, [r7, #24] + 8001078: 2311 movs r3, #17 + 800107a: 61bb str r3, [r7, #24] Timing.AccessMode = FMC_ACCESS_MODE_A; - 80010bc: 2300 movs r3, #0 - 80010be: 61fb str r3, [r7, #28] + 800107c: 2300 movs r3, #0 + 800107e: 61fb str r3, [r7, #28] /* ExtTiming */ if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK) - 80010c0: 1d3b adds r3, r7, #4 - 80010c2: 2200 movs r2, #0 - 80010c4: 4619 mov r1, r3 - 80010c6: 4806 ldr r0, [pc, #24] ; (80010e0 ) - 80010c8: f002 fb6e bl 80037a8 - 80010cc: 4603 mov r3, r0 - 80010ce: 2b00 cmp r3, #0 - 80010d0: d001 beq.n 80010d6 + 8001080: 1d3b adds r3, r7, #4 + 8001082: 2200 movs r2, #0 + 8001084: 4619 mov r1, r3 + 8001086: 4806 ldr r0, [pc, #24] ; (80010a0 ) + 8001088: f002 fb8e bl 80037a8 + 800108c: 4603 mov r3, r0 + 800108e: 2b00 cmp r3, #0 + 8001090: d001 beq.n 8001096 { Error_Handler( ); - 80010d2: f000 f893 bl 80011fc + 8001092: f000 f8b4 bl 80011fe } /* USER CODE BEGIN FMC_Init 2 */ /* USER CODE END FMC_Init 2 */ } - 80010d6: bf00 nop - 80010d8: 3720 adds r7, #32 - 80010da: 46bd mov sp, r7 - 80010dc: bd80 pop {r7, pc} - 80010de: bf00 nop - 80010e0: 200009fc .word 0x200009fc - 80010e4: a0000104 .word 0xa0000104 + 8001096: bf00 nop + 8001098: 3720 adds r7, #32 + 800109a: 46bd mov sp, r7 + 800109c: bd80 pop {r7, pc} + 800109e: bf00 nop + 80010a0: 200009fc .word 0x200009fc + 80010a4: a0000104 .word 0xa0000104 -080010e8 : +080010a8 : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { - 80010e8: b580 push {r7, lr} - 80010ea: b08c sub sp, #48 ; 0x30 - 80010ec: af00 add r7, sp, #0 + 80010a8: b580 push {r7, lr} + 80010aa: b08c sub sp, #48 ; 0x30 + 80010ac: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 80010ee: f107 031c add.w r3, r7, #28 - 80010f2: 2200 movs r2, #0 - 80010f4: 601a str r2, [r3, #0] - 80010f6: 605a str r2, [r3, #4] - 80010f8: 609a str r2, [r3, #8] - 80010fa: 60da str r2, [r3, #12] - 80010fc: 611a str r2, [r3, #16] + 80010ae: f107 031c add.w r3, r7, #28 + 80010b2: 2200 movs r2, #0 + 80010b4: 601a str r2, [r3, #0] + 80010b6: 605a str r2, [r3, #4] + 80010b8: 609a str r2, [r3, #8] + 80010ba: 60da str r2, [r3, #12] + 80010bc: 611a str r2, [r3, #16] /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOE_CLK_ENABLE(); - 80010fe: 2300 movs r3, #0 - 8001100: 61bb str r3, [r7, #24] - 8001102: 4b3c ldr r3, [pc, #240] ; (80011f4 ) - 8001104: 6b1b ldr r3, [r3, #48] ; 0x30 - 8001106: 4a3b ldr r2, [pc, #236] ; (80011f4 ) - 8001108: f043 0310 orr.w r3, r3, #16 - 800110c: 6313 str r3, [r2, #48] ; 0x30 - 800110e: 4b39 ldr r3, [pc, #228] ; (80011f4 ) - 8001110: 6b1b ldr r3, [r3, #48] ; 0x30 - 8001112: f003 0310 and.w r3, r3, #16 - 8001116: 61bb str r3, [r7, #24] - 8001118: 69bb ldr r3, [r7, #24] + 80010be: 2300 movs r3, #0 + 80010c0: 61bb str r3, [r7, #24] + 80010c2: 4b3c ldr r3, [pc, #240] ; (80011b4 ) + 80010c4: 6b1b ldr r3, [r3, #48] ; 0x30 + 80010c6: 4a3b ldr r2, [pc, #236] ; (80011b4 ) + 80010c8: f043 0310 orr.w r3, r3, #16 + 80010cc: 6313 str r3, [r2, #48] ; 0x30 + 80010ce: 4b39 ldr r3, [pc, #228] ; (80011b4 ) + 80010d0: 6b1b ldr r3, [r3, #48] ; 0x30 + 80010d2: f003 0310 and.w r3, r3, #16 + 80010d6: 61bb str r3, [r7, #24] + 80010d8: 69bb ldr r3, [r7, #24] __HAL_RCC_GPIOC_CLK_ENABLE(); - 800111a: 2300 movs r3, #0 - 800111c: 617b str r3, [r7, #20] - 800111e: 4b35 ldr r3, [pc, #212] ; (80011f4 ) - 8001120: 6b1b ldr r3, [r3, #48] ; 0x30 - 8001122: 4a34 ldr r2, [pc, #208] ; (80011f4 ) - 8001124: f043 0304 orr.w r3, r3, #4 - 8001128: 6313 str r3, [r2, #48] ; 0x30 - 800112a: 4b32 ldr r3, [pc, #200] ; (80011f4 ) - 800112c: 6b1b ldr r3, [r3, #48] ; 0x30 - 800112e: f003 0304 and.w r3, r3, #4 - 8001132: 617b str r3, [r7, #20] - 8001134: 697b ldr r3, [r7, #20] + 80010da: 2300 movs r3, #0 + 80010dc: 617b str r3, [r7, #20] + 80010de: 4b35 ldr r3, [pc, #212] ; (80011b4 ) + 80010e0: 6b1b ldr r3, [r3, #48] ; 0x30 + 80010e2: 4a34 ldr r2, [pc, #208] ; (80011b4 ) + 80010e4: f043 0304 orr.w r3, r3, #4 + 80010e8: 6313 str r3, [r2, #48] ; 0x30 + 80010ea: 4b32 ldr r3, [pc, #200] ; (80011b4 ) + 80010ec: 6b1b ldr r3, [r3, #48] ; 0x30 + 80010ee: f003 0304 and.w r3, r3, #4 + 80010f2: 617b str r3, [r7, #20] + 80010f4: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOF_CLK_ENABLE(); - 8001136: 2300 movs r3, #0 - 8001138: 613b str r3, [r7, #16] - 800113a: 4b2e ldr r3, [pc, #184] ; (80011f4 ) - 800113c: 6b1b ldr r3, [r3, #48] ; 0x30 - 800113e: 4a2d ldr r2, [pc, #180] ; (80011f4 ) - 8001140: f043 0320 orr.w r3, r3, #32 - 8001144: 6313 str r3, [r2, #48] ; 0x30 - 8001146: 4b2b ldr r3, [pc, #172] ; (80011f4 ) - 8001148: 6b1b ldr r3, [r3, #48] ; 0x30 - 800114a: f003 0320 and.w r3, r3, #32 - 800114e: 613b str r3, [r7, #16] - 8001150: 693b ldr r3, [r7, #16] + 80010f6: 2300 movs r3, #0 + 80010f8: 613b str r3, [r7, #16] + 80010fa: 4b2e ldr r3, [pc, #184] ; (80011b4 ) + 80010fc: 6b1b ldr r3, [r3, #48] ; 0x30 + 80010fe: 4a2d ldr r2, [pc, #180] ; (80011b4 ) + 8001100: f043 0320 orr.w r3, r3, #32 + 8001104: 6313 str r3, [r2, #48] ; 0x30 + 8001106: 4b2b ldr r3, [pc, #172] ; (80011b4 ) + 8001108: 6b1b ldr r3, [r3, #48] ; 0x30 + 800110a: f003 0320 and.w r3, r3, #32 + 800110e: 613b str r3, [r7, #16] + 8001110: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); - 8001152: 2300 movs r3, #0 - 8001154: 60fb str r3, [r7, #12] - 8001156: 4b27 ldr r3, [pc, #156] ; (80011f4 ) - 8001158: 6b1b ldr r3, [r3, #48] ; 0x30 - 800115a: 4a26 ldr r2, [pc, #152] ; (80011f4 ) - 800115c: f043 0301 orr.w r3, r3, #1 - 8001160: 6313 str r3, [r2, #48] ; 0x30 - 8001162: 4b24 ldr r3, [pc, #144] ; (80011f4 ) - 8001164: 6b1b ldr r3, [r3, #48] ; 0x30 - 8001166: f003 0301 and.w r3, r3, #1 - 800116a: 60fb str r3, [r7, #12] - 800116c: 68fb ldr r3, [r7, #12] + 8001112: 2300 movs r3, #0 + 8001114: 60fb str r3, [r7, #12] + 8001116: 4b27 ldr r3, [pc, #156] ; (80011b4 ) + 8001118: 6b1b ldr r3, [r3, #48] ; 0x30 + 800111a: 4a26 ldr r2, [pc, #152] ; (80011b4 ) + 800111c: f043 0301 orr.w r3, r3, #1 + 8001120: 6313 str r3, [r2, #48] ; 0x30 + 8001122: 4b24 ldr r3, [pc, #144] ; (80011b4 ) + 8001124: 6b1b ldr r3, [r3, #48] ; 0x30 + 8001126: f003 0301 and.w r3, r3, #1 + 800112a: 60fb str r3, [r7, #12] + 800112c: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOG_CLK_ENABLE(); - 800116e: 2300 movs r3, #0 - 8001170: 60bb str r3, [r7, #8] - 8001172: 4b20 ldr r3, [pc, #128] ; (80011f4 ) - 8001174: 6b1b ldr r3, [r3, #48] ; 0x30 - 8001176: 4a1f ldr r2, [pc, #124] ; (80011f4 ) - 8001178: f043 0340 orr.w r3, r3, #64 ; 0x40 - 800117c: 6313 str r3, [r2, #48] ; 0x30 - 800117e: 4b1d ldr r3, [pc, #116] ; (80011f4 ) - 8001180: 6b1b ldr r3, [r3, #48] ; 0x30 - 8001182: f003 0340 and.w r3, r3, #64 ; 0x40 - 8001186: 60bb str r3, [r7, #8] - 8001188: 68bb ldr r3, [r7, #8] + 800112e: 2300 movs r3, #0 + 8001130: 60bb str r3, [r7, #8] + 8001132: 4b20 ldr r3, [pc, #128] ; (80011b4 ) + 8001134: 6b1b ldr r3, [r3, #48] ; 0x30 + 8001136: 4a1f ldr r2, [pc, #124] ; (80011b4 ) + 8001138: f043 0340 orr.w r3, r3, #64 ; 0x40 + 800113c: 6313 str r3, [r2, #48] ; 0x30 + 800113e: 4b1d ldr r3, [pc, #116] ; (80011b4 ) + 8001140: 6b1b ldr r3, [r3, #48] ; 0x30 + 8001142: f003 0340 and.w r3, r3, #64 ; 0x40 + 8001146: 60bb str r3, [r7, #8] + 8001148: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOB_CLK_ENABLE(); - 800118a: 2300 movs r3, #0 - 800118c: 607b str r3, [r7, #4] - 800118e: 4b19 ldr r3, [pc, #100] ; (80011f4 ) - 8001190: 6b1b ldr r3, [r3, #48] ; 0x30 - 8001192: 4a18 ldr r2, [pc, #96] ; (80011f4 ) - 8001194: f043 0302 orr.w r3, r3, #2 - 8001198: 6313 str r3, [r2, #48] ; 0x30 - 800119a: 4b16 ldr r3, [pc, #88] ; (80011f4 ) - 800119c: 6b1b ldr r3, [r3, #48] ; 0x30 - 800119e: f003 0302 and.w r3, r3, #2 - 80011a2: 607b str r3, [r7, #4] - 80011a4: 687b ldr r3, [r7, #4] + 800114a: 2300 movs r3, #0 + 800114c: 607b str r3, [r7, #4] + 800114e: 4b19 ldr r3, [pc, #100] ; (80011b4 ) + 8001150: 6b1b ldr r3, [r3, #48] ; 0x30 + 8001152: 4a18 ldr r2, [pc, #96] ; (80011b4 ) + 8001154: f043 0302 orr.w r3, r3, #2 + 8001158: 6313 str r3, [r2, #48] ; 0x30 + 800115a: 4b16 ldr r3, [pc, #88] ; (80011b4 ) + 800115c: 6b1b ldr r3, [r3, #48] ; 0x30 + 800115e: f003 0302 and.w r3, r3, #2 + 8001162: 607b str r3, [r7, #4] + 8001164: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOD_CLK_ENABLE(); - 80011a6: 2300 movs r3, #0 - 80011a8: 603b str r3, [r7, #0] - 80011aa: 4b12 ldr r3, [pc, #72] ; (80011f4 ) - 80011ac: 6b1b ldr r3, [r3, #48] ; 0x30 - 80011ae: 4a11 ldr r2, [pc, #68] ; (80011f4 ) - 80011b0: f043 0308 orr.w r3, r3, #8 - 80011b4: 6313 str r3, [r2, #48] ; 0x30 - 80011b6: 4b0f ldr r3, [pc, #60] ; (80011f4 ) - 80011b8: 6b1b ldr r3, [r3, #48] ; 0x30 - 80011ba: f003 0308 and.w r3, r3, #8 - 80011be: 603b str r3, [r7, #0] - 80011c0: 683b ldr r3, [r7, #0] + 8001166: 2300 movs r3, #0 + 8001168: 603b str r3, [r7, #0] + 800116a: 4b12 ldr r3, [pc, #72] ; (80011b4 ) + 800116c: 6b1b ldr r3, [r3, #48] ; 0x30 + 800116e: 4a11 ldr r2, [pc, #68] ; (80011b4 ) + 8001170: f043 0308 orr.w r3, r3, #8 + 8001174: 6313 str r3, [r2, #48] ; 0x30 + 8001176: 4b0f ldr r3, [pc, #60] ; (80011b4 ) + 8001178: 6b1b ldr r3, [r3, #48] ; 0x30 + 800117a: f003 0308 and.w r3, r3, #8 + 800117e: 603b str r3, [r7, #0] + 8001180: 683b ldr r3, [r7, #0] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, GPIO_PIN_14, GPIO_PIN_RESET); - 80011c2: 2200 movs r2, #0 - 80011c4: f44f 4180 mov.w r1, #16384 ; 0x4000 - 80011c8: 480b ldr r0, [pc, #44] ; (80011f8 ) - 80011ca: f001 fea3 bl 8002f14 + 8001182: 2200 movs r2, #0 + 8001184: f44f 4180 mov.w r1, #16384 ; 0x4000 + 8001188: 480b ldr r0, [pc, #44] ; (80011b8 ) + 800118a: f001 fec3 bl 8002f14 /*Configure GPIO pin : PC14 */ GPIO_InitStruct.Pin = GPIO_PIN_14; - 80011ce: f44f 4380 mov.w r3, #16384 ; 0x4000 - 80011d2: 61fb str r3, [r7, #28] + 800118e: f44f 4380 mov.w r3, #16384 ; 0x4000 + 8001192: 61fb str r3, [r7, #28] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 80011d4: 2301 movs r3, #1 - 80011d6: 623b str r3, [r7, #32] + 8001194: 2301 movs r3, #1 + 8001196: 623b str r3, [r7, #32] GPIO_InitStruct.Pull = GPIO_NOPULL; - 80011d8: 2300 movs r3, #0 - 80011da: 627b str r3, [r7, #36] ; 0x24 + 8001198: 2300 movs r3, #0 + 800119a: 627b str r3, [r7, #36] ; 0x24 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 80011dc: 2300 movs r3, #0 - 80011de: 62bb str r3, [r7, #40] ; 0x28 + 800119c: 2300 movs r3, #0 + 800119e: 62bb str r3, [r7, #40] ; 0x28 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 80011e0: f107 031c add.w r3, r7, #28 - 80011e4: 4619 mov r1, r3 - 80011e6: 4804 ldr r0, [pc, #16] ; (80011f8 ) - 80011e8: f001 fce8 bl 8002bbc + 80011a0: f107 031c add.w r3, r7, #28 + 80011a4: 4619 mov r1, r3 + 80011a6: 4804 ldr r0, [pc, #16] ; (80011b8 ) + 80011a8: f001 fd08 bl 8002bbc } - 80011ec: bf00 nop - 80011ee: 3730 adds r7, #48 ; 0x30 - 80011f0: 46bd mov sp, r7 - 80011f2: bd80 pop {r7, pc} - 80011f4: 40023800 .word 0x40023800 - 80011f8: 40020800 .word 0x40020800 + 80011ac: bf00 nop + 80011ae: 3730 adds r7, #48 ; 0x30 + 80011b0: 46bd mov sp, r7 + 80011b2: bd80 pop {r7, pc} + 80011b4: 40023800 .word 0x40023800 + 80011b8: 40020800 .word 0x40020800 -080011fc : +080011bc : + +/* USER CODE BEGIN 4 */ +uint16_t read_isa(uint16_t addr) +{ + 80011bc: b480 push {r7} + 80011be: b083 sub sp, #12 + 80011c0: af00 add r7, sp, #0 + 80011c2: 4603 mov r3, r0 + 80011c4: 80fb strh r3, [r7, #6] + return *(uint16_t*)(ISA_BASE_RD + addr); + 80011c6: 88fb ldrh r3, [r7, #6] + 80011c8: f503 3300 add.w r3, r3, #131072 ; 0x20000 + 80011cc: 881b ldrh r3, [r3, #0] +} + 80011ce: 4618 mov r0, r3 + 80011d0: 370c adds r7, #12 + 80011d2: 46bd mov sp, r7 + 80011d4: f85d 7b04 ldr.w r7, [sp], #4 + 80011d8: 4770 bx lr + +080011da : + +void write_isa(uint16_t addr, uint16_t data) +{ + 80011da: b480 push {r7} + 80011dc: b083 sub sp, #12 + 80011de: af00 add r7, sp, #0 + 80011e0: 4603 mov r3, r0 + 80011e2: 460a mov r2, r1 + 80011e4: 80fb strh r3, [r7, #6] + 80011e6: 4613 mov r3, r2 + 80011e8: 80bb strh r3, [r7, #4] + *(uint16_t*)(ISA_BASE_WR + addr) = data; + 80011ea: 88fb ldrh r3, [r7, #6] + 80011ec: 461a mov r2, r3 + 80011ee: 88bb ldrh r3, [r7, #4] + 80011f0: 8013 strh r3, [r2, #0] +} + 80011f2: bf00 nop + 80011f4: 370c adds r7, #12 + 80011f6: 46bd mov sp, r7 + 80011f8: f85d 7b04 ldr.w r7, [sp], #4 + 80011fc: 4770 bx lr + +080011fe : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { - 80011fc: b480 push {r7} - 80011fe: af00 add r7, sp, #0 + 80011fe: b480 push {r7} + 8001200: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); - 8001200: b672 cpsid i + 8001202: b672 cpsid i } - 8001202: bf00 nop + 8001204: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) - 8001204: e7fe b.n 8001204 - ... + 8001206: e7fe b.n 8001206 08001208 : /* USER CODE END 0 */ @@ -2616,31 +2614,30 @@ int32_t DP83848_RegisterBusIO(dp83848_Object_t *pObj, dp83848_IOCtx_t *ioctx) } return status; - } 80015c0: 693b ldr r3, [r7, #16] - + } 80015c2: 4618 mov r0, r3 80015c4: 3718 adds r7, #24 80015c6: 46bd mov sp, r7 80015c8: bd80 pop {r7, pc} 080015ca : + * DP83848_STATUS_10MBITS_HALFDUPLEX if 10Mb/s HD * DP83848_STATUS_READ_ERROR if connot read register * DP83848_STATUS_WRITE_ERROR if connot write to register */ int32_t DP83848_GetLinkState(dp83848_Object_t *pObj) { - uint32_t readval = 0; 80015ca: b580 push {r7, lr} 80015cc: b084 sub sp, #16 80015ce: af00 add r7, sp, #0 80015d0: 6078 str r0, [r7, #4] - + uint32_t readval = 0; 80015d2: 2300 movs r3, #0 80015d4: 60fb str r3, [r7, #12] + /* Read Status register */ if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_BSR, &readval) < 0) - { 80015d6: 687b ldr r3, [r7, #4] 80015d8: 695b ldr r3, [r3, #20] 80015da: 687a ldr r2, [r7, #4] @@ -2651,14 +2648,14 @@ int32_t DP83848_GetLinkState(dp83848_Object_t *pObj) 80015e6: 4603 mov r3, r0 80015e8: 2b00 cmp r3, #0 80015ea: da02 bge.n 80015f2 + { return DP83848_STATUS_READ_ERROR; - } 80015ec: f06f 0304 mvn.w r3, #4 80015f0: e06e b.n 80016d0 + } /* Read Status register again */ if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_BSR, &readval) < 0) - { 80015f2: 687b ldr r3, [r7, #4] 80015f4: 695b ldr r3, [r3, #20] 80015f6: 687a ldr r2, [r7, #4] @@ -2669,26 +2666,26 @@ int32_t DP83848_GetLinkState(dp83848_Object_t *pObj) 8001602: 4603 mov r3, r0 8001604: 2b00 cmp r3, #0 8001606: da02 bge.n 800160e + { return DP83848_STATUS_READ_ERROR; - } 8001608: f06f 0304 mvn.w r3, #4 800160c: e060 b.n 80016d0 + } if((readval & DP83848_BSR_LINK_STATUS) == 0) - { 800160e: 68fb ldr r3, [r7, #12] 8001610: f003 0304 and.w r3, r3, #4 8001614: 2b00 cmp r3, #0 8001616: d101 bne.n 800161c + { /* Return Link Down status */ return DP83848_STATUS_LINK_DOWN; - } 8001618: 2301 movs r3, #1 800161a: e059 b.n 80016d0 + } /* Check Auto negotiaition */ if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_BCR, &readval) < 0) - { 800161c: 687b ldr r3, [r7, #4] 800161e: 695b ldr r3, [r3, #20] 8001620: 687a ldr r2, [r7, #4] @@ -2699,19 +2696,19 @@ int32_t DP83848_GetLinkState(dp83848_Object_t *pObj) 800162c: 4603 mov r3, r0 800162e: 2b00 cmp r3, #0 8001630: da02 bge.n 8001638 + { return DP83848_STATUS_READ_ERROR; - } 8001632: f06f 0304 mvn.w r3, #4 8001636: e04b b.n 80016d0 + } if((readval & DP83848_BCR_AUTONEGO_EN) != DP83848_BCR_AUTONEGO_EN) - { 8001638: 68fb ldr r3, [r7, #12] 800163a: f403 5380 and.w r3, r3, #4096 ; 0x1000 800163e: 2b00 cmp r3, #0 8001640: d11b bne.n 800167a + { if(((readval & DP83848_BCR_SPEED_SELECT) == DP83848_BCR_SPEED_SELECT) && ((readval & DP83848_BCR_DUPLEX_MODE) == DP83848_BCR_DUPLEX_MODE)) - { 8001642: 68fb ldr r3, [r7, #12] 8001644: f403 5300 and.w r3, r3, #8192 ; 0x2000 8001648: 2b00 cmp r3, #0 @@ -2720,41 +2717,41 @@ int32_t DP83848_GetLinkState(dp83848_Object_t *pObj) 800164e: f403 7380 and.w r3, r3, #256 ; 0x100 8001652: 2b00 cmp r3, #0 8001654: d001 beq.n 800165a + { return DP83848_STATUS_100MBITS_FULLDUPLEX; - } 8001656: 2302 movs r3, #2 8001658: e03a b.n 80016d0 + } else if ((readval & DP83848_BCR_SPEED_SELECT) == DP83848_BCR_SPEED_SELECT) - { 800165a: 68fb ldr r3, [r7, #12] 800165c: f403 5300 and.w r3, r3, #8192 ; 0x2000 8001660: 2b00 cmp r3, #0 8001662: d001 beq.n 8001668 + { return DP83848_STATUS_100MBITS_HALFDUPLEX; - } 8001664: 2303 movs r3, #3 8001666: e033 b.n 80016d0 + } else if ((readval & DP83848_BCR_DUPLEX_MODE) == DP83848_BCR_DUPLEX_MODE) - { 8001668: 68fb ldr r3, [r7, #12] 800166a: f403 7380 and.w r3, r3, #256 ; 0x100 800166e: 2b00 cmp r3, #0 8001670: d001 beq.n 8001676 + { return DP83848_STATUS_10MBITS_FULLDUPLEX; - } 8001672: 2304 movs r3, #4 8001674: e02c b.n 80016d0 + } else { return DP83848_STATUS_10MBITS_HALFDUPLEX; - } 8001676: 2305 movs r3, #5 8001678: e02a b.n 80016d0 + } } else /* Auto Nego enabled */ { if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_PHYSCSR, &readval) < 0) - { 800167a: 687b ldr r3, [r7, #4] 800167c: 695b ldr r3, [r3, #20] 800167e: 687a ldr r2, [r7, #4] @@ -2765,61 +2762,61 @@ int32_t DP83848_GetLinkState(dp83848_Object_t *pObj) 800168a: 4603 mov r3, r0 800168c: 2b00 cmp r3, #0 800168e: da02 bge.n 8001696 + { return DP83848_STATUS_READ_ERROR; - } 8001690: f06f 0304 mvn.w r3, #4 8001694: e01c b.n 80016d0 + } /* Check if auto nego not done */ if((readval & DP83848_PHYSCSR_AUTONEGO_DONE) == 0) - { 8001696: 68fb ldr r3, [r7, #12] 8001698: f403 7380 and.w r3, r3, #256 ; 0x100 800169c: 2b00 cmp r3, #0 800169e: d101 bne.n 80016a4 + { return DP83848_STATUS_AUTONEGO_NOTDONE; - } 80016a0: 2306 movs r3, #6 80016a2: e015 b.n 80016d0 + } if((readval & DP83848_PHYSCSR_HCDSPEEDMASK) == DP83848_PHYSCSR_100BTX_FD) - { 80016a4: 68fb ldr r3, [r7, #12] 80016a6: f003 0306 and.w r3, r3, #6 80016aa: 2b04 cmp r3, #4 80016ac: d101 bne.n 80016b2 + { return DP83848_STATUS_100MBITS_FULLDUPLEX; - } 80016ae: 2302 movs r3, #2 80016b0: e00e b.n 80016d0 + } else if ((readval & DP83848_PHYSCSR_HCDSPEEDMASK) == DP83848_PHYSCSR_100BTX_HD) - { 80016b2: 68fb ldr r3, [r7, #12] 80016b4: f003 0306 and.w r3, r3, #6 80016b8: 2b00 cmp r3, #0 80016ba: d101 bne.n 80016c0 + { return DP83848_STATUS_100MBITS_HALFDUPLEX; - } 80016bc: 2303 movs r3, #3 80016be: e007 b.n 80016d0 + } else if ((readval & DP83848_PHYSCSR_HCDSPEEDMASK) == DP83848_PHYSCSR_10BT_FD) - { 80016c0: 68fb ldr r3, [r7, #12] 80016c2: f003 0306 and.w r3, r3, #6 80016c6: 2b06 cmp r3, #6 80016c8: d101 bne.n 80016ce + { return DP83848_STATUS_10MBITS_FULLDUPLEX; - } 80016ca: 2304 movs r3, #4 80016cc: e000 b.n 80016d0 + } else { return DP83848_STATUS_10MBITS_HALFDUPLEX; - } 80016ce: 2305 movs r3, #5 + } } } - 80016d0: 4618 mov r0, r3 80016d2: 3710 adds r7, #16 80016d4: 46bd mov sp, r7 @@ -9484,7 +9481,7 @@ static void low_level_init(struct netif *netif) } 8003c60: e001 b.n 8003c66 Error_Handler(); - 8003c62: f7fd facb bl 80011fc + 8003c62: f7fd facc bl 80011fe } 8003c66: bf00 nop 8003c68: 3710 adds r7, #16